STP25NM60N datasheet(3/12 Pages) STMICROELECTRONICS

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STP25NM60N - STF25NM60N - STB25NM60N/-1 - STW25NM60N

ELECTRICAL CHARACTERISTICS (CONTINUED)

Table 7: Dynamic

Table 8: Source Drain Diode

(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

(2) Pulse width limited by safe operating area.

(3) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

gfs (1)

Forward Transconductance

VDS = 15V , ID= 10A

Ciss

Coss

Crss

Input Capacitance

Output Capacitance

Reverse Transfer

Capacitance

VDS = 25 V, f = 1 MHz,

VGS = 0

2565

511

COSS eq (3).

Equivalent Output

Capacitance

VGS = 0 V, VDS = 0 to 480 V

TBD

Gate Input Resistance

f=1 MHz Gate DC Bias = 0

Test Signal Level = 20mV

Open Drain

Ω

td(on)

td(off)

Turn-on Delay Time

Rise Time

Turn-off-Delay Time

Fall Time

VDD = 300 V, ID = 10 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 4)

TBD

Qgs

Qgd

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

VDD = 480 V, ID = 20 A,

VGS = 10 V

(see Figure 7)

TBD

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

ISD

ISDM (2)

Source-drain Current

Source-drain Current (pulsed)

VSD (1)

Forward On Voltage

ISD = 20 A, VGS = 0

1.3

trr

Qrr

IRRM

Reverse Recovery Time

Reverse Recovery Charge

Reverse Recovery Current

ISD = 25 A, di/dt = 100 A/µs

VDD = 100V

(see Figure 5)

TBD

µC

trr

Qrr

IRRM

Reverse Recovery Time

Reverse Recovery Charge

Reverse Recovery Current

ISD = 25 A, di/dt = 100 A/µs

VDD = 100V, Tj = 150°C

(see Figure 5)

TBD

µC

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