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LTC2249CUH Datasheet(PDF) 7 Page - Linear Technology |
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LTC2249CUH Datasheet(HTML) 7 Page - Linear Technology |
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7 / 20 page ![]() LTC2249 7 2249f TYPICAL PERFOR A CE CHARACTERISTICS SNR vs Input Level, fIN = 70MHz, 2V Range IOVDD vs Sample Rate, 5MHz Sine Wave Input, –1dB, OVDD = 1.8V IVDD vs Sample Rate, 5MHz Sine Wave Input, –1dB SFDR vs Input Level, fIN = 70MHz, 2V Range PI FU CTIO S AIN+ (Pin 1): Positive Differential Analog Input. AIN- (Pin 2): Negative Differential Analog Input. REFH (Pins 3, 4): ADC High Reference. Short together and bypass to pins 5, 6 with a 0.1µF ceramic chip capacitor as close to the pin as possible. Also bypass to pins 5, 6 with an additional 2.2µF ceramic chip capacitor and to ground with a 1µF ceramic chip capacitor. REFL (Pins 5, 6): ADC Low Reference. Short together and bypass to pins 3, 4 with a 0.1µF ceramic chip capacitor as close to the pin as possible. Also bypass to pins 3, 4 with an additional 2.2µF ceramic chip capacitor and to ground with a 1µF ceramic chip capacitor. VDD (Pins 7, 32): 3V Supply. Bypass to GND with 0.1µF ceramic chip capacitors. GND (Pin 8): ADC Power Ground. CLK (Pin 9): Clock Input. The input sample starts on the positive edge. SHDN (Pin 10): Shutdown Mode Selection Pin. Connect- ing SHDN to GND and OE to GND results in normal INPUT LEVEL (dBFS) –50 –60 –70 30 40 50 –20 0 2249 G13 20 10 0 –40 –30 dBFS dBc –10 60 70 80 INPUT LEVEL (dBFS) –80 60 dBc dBFS 90 100 0 2249 G14 50 40 0 –60 –40 –20 20 120 110 80 70 30 10 100dBc SFDR REFERENCE LINE SAMPLE RATE (Msps) 0 50 55 65 70 75 85 10 50 70 2249 G15 60 80 40 90 100 20 30 60 80 2V RANGE 1V RANGE SAMPLE RATE (Msps) 0 0 1 3 4 5 7 10 50 70 2249 G16 2 6 40 90 100 20 30 60 80 |
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