AX88875AP datasheet(16/23 Pages) ASIX

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AX88875AP Bripeater

ASIX ELECTRONICS CORPORATION

4.0 INTERNAL REGISTERS

4.1 Configuration Register (CONFIG)

Bit

Bit Name

Access

Bit Description

/HALF10

R/W

Half-duplex mode in 10Mbps : “low” resister to 10Mbps PHY in half-

duplex mode. “high” resister to 10Mbps PHY in full-duplex mode.

OPT[4]

R/W

OPT[4] : Option for external device type to connect to port 4. Default

‘high’ is for PHY type device. Otherwise, ‘low’ for bridge, switch or

MAC type device.

TXM_MODE

R/W

TXM_MODE : Option for internal used. Default ‘high’ user may pull the

pin ‘low’ with 10K ohm resister for reserve transmition mode alternaty.

MODE

R/W

MODE

= 0 : Single chip repeater application.

MODE

= 1 : Multiple chips cascaded repeater application.

EN_FLOW_

CTL

R/W

EN_FLOW_CTL = 0 : Disable flow control function.

EN_FLOW_CTL = 1 : Enable flow control function.

ST_FW

R/W

ST_FW

= 0 : fragment-free mode

ST_FW

=1 : Store-n-Forward mode

ENTRIES

R/W

ENTRIES

= 0 : 1024 entries supported

ENTRIES

= 1 : 256 entries supported

D2-1

MEM_SIZE[1]

MEM_SIZE[0]

R/W

MEM_SIZE[1] MEM_SIZE[1]

SIZE (K)

32K

64K

128K

N/A

/IR_ACT_EN

R/W

Inter Repeater Active Input Pin Enable : Designer must keep the pin pull

high to disable the function.

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