© 2005 Fairchild Semiconductor Corporation

DS010627

www.fairchildsemi.com

February 1990

Revised May 2005

MM74HCT573 • MM74HCT574

Octal D-Type Latch • 3-STATE Octal D-Type Flip-Flop

General Description

The

MM74HCT573

octal

D-type

latches

and

MM74HCT574 octal D-type flip-flop advanced silicon-gate

CMOS technology, which provides the inherent benefits of

low power consumption and wide power supply range, but

are LS-TTL input and output characteristic and pin-out

compatible. The 3-STATE outputs are capable of driving 15

LS-TTL loads. All inputs are protected from damage due to

When the MM74HCT573 Latch Enable input is HIGH, the

Q outputs will follow the D inputs. When the Latch Enable

goes LOW, data at the D inputs will be retained at the out-

puts until Latch Enable returns HIGH again. When a high

logic level is applied to the Output Control input, all outputs

go to a high impedance state, regardless of what signals

are present at the other inputs and the state of the storage

elements.

The MM74HCT574 are positive edge triggered flip-flops.

Data at the D inputs, meeting the setup and hold time

requirements, are transferred to the Q outputs on positive

going transitions of the Clock (CK) input. When a high logic

level is applied to the Output Control (OC) input, all outputs

go to a high impedance state, regardless of what signals

are present at the other inputs and the state of the storage

elements.

The MM74HCT devices are intended to interface between

TTL and NMOS components and standard CMOS devices.

These parts are also plug in replacements for LS-TTL

devices and can be used to reduce power consumption in

existing designs.

Features

■ TTL input characteristic compatible

■ Typical propagation delay: 18 ns

■ Low input current: 1

PA maximum

■ Low quiescent current: 80

PA maximum

■ Compatible with bus-oriented systems

■ Output drive capability: 15 LS-TTL loads

Ordering Codes:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Order Number

Package Number

Package Description

MM74HCT573WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

MM74HCT573SJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HCT573MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HCT573N

N20A

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

MM74HCT574WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

MM74HCT574SJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HCT574MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HCT574N

N20A

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide