AD5220 datasheet(14/16 Pages) AD

14 / 16 page

REV. B

AD5200/AD5201

–14–

TEST CIRCUITS

Figures 6 to 14 define the test conditions used in the product

specification table.

VMS

DUT

V+

V+ = VDD

1 LSB = V+/2N

Figure 6. Potentiometer Divider Nonlinearity Error Test

Circuit (INL, DNL)

VMS

DUT

NO CONNECT

Figure 7. Resistor Position Nonlinearity Error

(Rheostat Operation; R-INL, R-DNL)

VMS1

DUT

IW = VDD/RNOMINAL

VMS2

RW = [VMS1 – VMS2]/IW

Figure 8. Wiper Resistance Test Circuit

VMS%

VDD%

PSS (%/%) =

V+ = VDD 10%

PSRR (dB) = 20 LOG

VMS

VDD

VMS

V+

VDD

Figure 9. Power Supply Sensitivity Test Circuit

(PSS, PSRR)

OP279

VOUT

OFFSET

GND

OFFSET BIAS

DUT

VIN

Figure 10. Inverting Gain Test Circuit

OFFSET BIAS

OFFSET

GND

DUT

OP279

VOUT

VIN

Figure 11. Noninverting Gain Test Circuit

OP42

VOUT

VIN

+15V

OFFSET

GND

–15V

2.5V

Figure 12. Gain vs. Frequency Test Circuit

VSS TO VDD

DUT

ISW

CODE = OOH

RSW =

0.1V

ISW

0.1V

–

Figure 13. Incremental ON Resistance Test Circuit

ICM

GND

VSS

VDD

DUT

VCM

NC = NO CONNECT

Figure 14. Common-Mode Leakage Current Test Circuit

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