ZXLD1350Q

Document number: DS37076 Rev. 2 - 2

13 of 21

www.diodes.com

September 2017

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ZXLD1350Q

High Frequency PWM Mode

At PWM frequencies above 10kHz and for duty cycles above 0.16, the output of the internal low pass filter will contain a DC component that is

always above the shutdown threshold. This will maintain continuous device operation and the nominal average output current will be proportional

to the average voltage at the output of the filter, which is directly proportional to the duty cycle. (See Figure 3

– High frequency PWM operating

waveforms). For best results, the PWM frequency should be maintained above the minimum specified value of 10kHz, in order to minimize ripple

at the output of the filter. The shutdown comparator has approximately 50mV of hysteresis, to minimize erratic switching due to this ripple. An

upper PWM frequency limit of approximately one tenth of the operating frequency is recommended, to avoid excessive output modulation and to

avoid injecting excessive noise into the internal reference.

Figure 3. High Frequency PWM Operating Waveforms

The nominal average value of output current in this mode is given by:

This mode will give minimum output ripple and reduced radiated emission, but with a reduced dimming range (approx.5:1). The restricted dimming

range is a result of the device being turned off when the DC component on the filter output falls below 200mV.

Shutdown Mode

Taking the ADJ pin to a voltage below 0.2V for more than approximately 100μs, will turn off the output and supply current will fall to a low standby

level of 15μA nominal.

average value. (See graphs for details).