UCS221G-AG6-R datasheet(4/5 Pages) UTC

4 / 5 page

UCS221

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

4 of 5

www.unisonic.com.tw

QW-R140-010.a



DETAILED DESCRIPTION

Current consumption

UCS221

uses internal bias circuit, so internal clock frequency and current consumption is not adjusted. The typical

current consumption curve of UCS221 is rep resented in accordance with VDD voltage as below. The higher VDD

requires more current consumption. Internal bias circuit can make t he circuit design simple and reduce external

components.

CS and CR implementation

The parallel capacitor CS is added to CS and CR to CR to adjust fine sensitivity. The major factor of the sensitivity

is CS. The sensitivity would be increased when smaller CS value is used. (Ref. below Sensitivity Example Figure)

The CR value should be almost the same as the total CS capacitance (CS_TOT) for effective differential sensitivity

calibration. The total CS capacitance is composed of CS which is set for optimal sensitivity and parasitic capacitance

of CS pattern (CPARA). The parasitic capacitance of CS pattern is about 2pF if normal touch pattern size is used. But

in the case of using larger touch pattern, CPARA is bigger than normal value.

The RS is serial connection resistor to avoid malfunction from extern al surge and ESD. (It might be optional.)

From 200Ω to 1kΩ is recommended for RS. The size and shape of touch PAD might have influence on the sensitivity.

The sensitivity will be optimal when the size of PAD is approximately an half of the first knuckle (it’s about 10mm×

7mm) . The connection line of CS to the touch PAD is recommended to be routed as short as possible to prevent

from abnormal touch detection caused by connection line.

UCS221G-AG6-R Datasheet(PDF) 4 Page - Unisonic Technologies