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PI6C3Q993 Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI6C3Q993 Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
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2 / 10 page ![]() 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6C3Q991, PI6CQ3993 3.3V Programmable Skew PLL Clock Driver SuperClock® 2 PS8449A 10/09/00 PinDescriptions e m a N n i Pe p y Tn o it p i r c s e D l a n o it c n u F F E RN It u p n i k c o l C e c n e r e f e R B FN It u p n I k c a b d e e F T S E T ) 1 ( N I s n o it c el e s w e k S .s t u p t u o ll a o t s e o g F E R .) 1 e t o N f o s n o it i d n o c r o f t p e c x e ( L L P s el b a si d , H G I H r o D I M n e h W . n o it a r e p o l a m r o n r o f W O L t e S .t c e ff e n i n i a m e r ) 3 el b a t e e s ( E O s/ D N G ) 1 ( N I 0 Q 3 - e t a t s W O L a n i ) 1 Q 3 d n a 0 Q 3 t p e c x e ( st u p t u o k c o l c s p o t s ti , H G I H n e h W . el b a n E t u p t u O s u o n o r h c n y S d n a l e v el D I M t a d l e h si T S E T n e h W . k c o l e s a h p n i a t n i a m o t l a n g i s k c a b d e e f e h t s a d e s u e b y a m 1 Q 3 r o . L L = ] 0 : 1 [ F n n e h w s k n a b l a u d i v i d n i r o f sl o rt n o c el b a si d t u p t u o s a t c a s n i p ] 0 : 1 [ F n e h t , H G I H si E O s/ D N G . n o it a r e p o l a m r o n r o f W O L E O s/ D N G t e S V Q C C E P /N I e h t h ti w d e zi n o r h c n y s e r a st u p t u o e h t H G I H / W O L n e h W .l o rt n o c e g d e e v it a g e n r o e v it i s o p el b a t c el e S . k c o l c e c n e r e f e r e h t f o e g d e e v it i s o p / e v it a g e n ] 0 : 1 [ F nN I. e g n a r y c n e u q e rf r o s p a t w e k s 9 f o 1 g n it c el e s r o f st u p n i l e v el - 3 S FN I 2 el b a t e e S . e g n a r y c n e u q e rf d e t a p i ci t n a n o d e s a b ti u c ri c r o t al li c s o e t ai r p o r p p a st c el e S ] 0 : 1 [ Q nT U O .s t u p t u o w e k s o r e z d e x if e r a 0 : 1 Q 4 3 9 9 Q 3 C 6 I P e h t n O . w e k s el b a m m a r g o r p h ti w ,s t u p t u o 2 f o s k n a b t u p t u o 4 V N C C R W Ps r e ff u b t u p t u o r o f y l p p u s r e w o P V Q C C R W Py rt i u c ri c l a n r e t n i r e h t o d n a p o o l d e k c o l e s a h p r o f y l p p u s r e w o P D N GR W Pd n u o r G Note: 1. When TEST = MID and GND/sOE = HIGH, PLL remains active with nF[1:0] =LL functioning as an output disable control for individual output banks. Skew selections (see Table 3) remain in effect unless nF[1:0] = LL. Logic Block Diagrams PI6C3Q991 Skew Select 3 3 3 1F1:0 1Q0 1Q1 Skew Select 3 3 2F1:0 2Q0 2Q1 Skew Select 3 3 3F1:0 3Q0 3Q1 Skew Select 3 3 4F1:0 4Q0 4Q1 GND/sOE REF PLL VCCQ/PE FB FS PI6C3Q993 Skew Select 3 3 3 1F1:0 1Q0 1Q1 Skew Select 3 3 2F1:0 2Q0 2Q1 Skew Select 3 3 3F1:0 3Q0 3Q1 4Q0 4Q1 GND/sOE REF PLL VCCQ/PE FB FS |
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