Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

N32905U2DN Datasheet(PDF) 14 Page - Nuvoton Technology Corporation

Part # N32905U2DN
Description  ARM926EJ-S Based Media Processor with Video Decode Accelerator
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NUVOTON [Nuvoton Technology Corporation]
Direct Link  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

N32905U2DN Datasheet(HTML) 14 Page - Nuvoton Technology Corporation

Back Button N32905U2DN Datasheet HTML 10Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 11Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 12Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 13Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 14Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 15Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 16Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 17Page - Nuvoton Technology Corporation N32905U2DN Datasheet HTML 18Page - Nuvoton Technology Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 34 page
background image
N3291xUxDN Data Sheet
- 14 -
Nuvoton Technology Corp.
Release Date: Jun. 2013
http://www.nuvoton.com/
Revision A3
PIN NAME
I/O
TYPE
DESCRIPTION
LVD_OUT
Low Voltage Dection Indicator
S2VSYNC
The 2
nd CMOS Camera Module VSYNC Signal
UHL_DP0
USB 1.1 Host Like Port 0 D+ Signal
GPD[3]
GPIO Port D Bit 3
TRST_
IOU
JTAG Interface Test Reset, Input, Low Active
HUR_RTS
High-Speed UART Reset-To-Send, Output, Low Active
SPI0_CS1_
SPI Port 0 Device Select 1, Output, Low Active
UHL_DM0
USB 1.1 Host like Port 0 D- Signal
S2HSYNC
The 2
nd CMOS Camera Module HSYNC Signal
GPD[4]
GPIO Port D Bit 4
NAND Interface
NCS0_
IOU
NAND Interface Chip Select 0, Output, Low Active
GPE[8]
GPIO Port E Bit 8
NCS1_
IOU
NAND Interface Chip Select 1, Output, Low Active
GPE[9]
GPIO Port E Bit 9
NALE
IOU
NAND Interface Address-Latch-Enable, Output, High Active
SDDAT2[0]
SD Port 2 Data Bit 0
GPE[10]
GPIO Port E Bit 10
NCLE
IOU
NAND Interface Command-Latch-Enable, Output, High Active
SDDAT2[1]
SD Port 2 Data Bit 1
GPE[11]
GPIO Port E Bit 11
NBUSY0_
IOU
NAND Interface Busy 0, Input, Low Active
SDDAT2[2]
SD Port 2 Data Bit 2
GPD[5]
GPIO Port D Bit 5
NBUSY1_
IOU
NAND Interface Busy 1, Input, Low Active
GPD[6]
GPIO Port D Bit 6
NRE_
IOU
NAND Interface Read Enable, Output, Low Active
SDCLK2
SD Port 2 Clock, Output



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com