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VSC8116QP2 Datasheet(PDF) 13 Page - Vitesse Semiconductor Corporation |
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VSC8116QP2 Datasheet(HTML) 13 Page - Vitesse Semiconductor Corporation |
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13 / 20 page  G52220-0, Rev 4.1 © VITESSE SEMICONDUCTOR CORPORATION Page 13 1/8/00 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC8116 ATM/SONET/SDH 622/155Mb/s Transceiver Mux/Demux with Integrated Clock Generation Package Pin Description Signal Pin I/O Level Pin Description RESET 1 I TTL Resets frame detection, dividers, controls; active high LOOPTIM0 2 I TTL Enable loop timing operation; active HIGH CMUFREQSEL 3 I TTL Reference clock frequency select, refer to table 2 VDD 4 P +3.3V +3.3V Power Supply TXDATAOUT+ 5 O PECL Transmit output, high speed differential data + TXDATAOUT- 6 O PECL Transmit output, high speed differential data - N/C 7 - - No connection RXCLKIN+ 8 I PECL Receive high speed differential clock input+ RXCLKIN- 9 I PECL Receive high speed differential clock input- VDD 10 P +3.3V +3.3V Power Supply OOF 11 I TTL Out Of Frame; Frame detection initiated with high level N/C 12 - - No connection RXDATAIN+ 13 I PECL Receive high speed differential data input+ RXDATAIN- 14 I PECL Receive high speed differential data input- VDD 15 P +3.3V +3.3V Power Supply N/C 16 - - No connection N/C 17 - - No connection VDD 18 P +3.3V +3.3V Power Supply RXOUT0 19 O TTL Receive output data bit0 RXOUT1 20 O TTL Receive output data bit1 VSS 21 P GND Ground RXOUT2 22 O TTL Receive output data bit2 RXOUT3 23 O TTL Receive output data bit3 RXOUT4 24 O TTL Receive output data bit4 RXOUT5 25 O TTL Receive output data bit5 RXOUT6 26 O TTL Receive output data bit6 RXOUT7 27 O TTL Receive output data bit7 VSS 28 P GND Ground RXLSCKOUT 29 O TTL Receive byte clock output FP 30 O TTL Frame detection pulse VDD 31 P +3.3V +3.3V Power Supply N/C 32 - - No connection LOSTTL 33 I TTL Loss of Signal Control - TTL input; active low VDD 34 P +3.3V +3.3V Power Supply VSS 35 P GND Ground REFCLK 36 I TTL Reference clock input, refer to table 2 VSSA 37 P GND Analog Ground (CMU) |
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