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EMD02N60CS Datasheet(PDF) 1 Page - Excelliance MOS Corp. |
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EMD02N60CS Datasheet(HTML) 1 Page - Excelliance MOS Corp. |
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1 / 5 page ![]() 2013/10/22 p.1 EMD02N60CS G D S N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 600V RDSON (MAX.) 5.5Ω ID 2A UIS, 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNIT Gate‐Source Voltage VGS ±30 V Continuous Drain Current TC = 25 °C ID 2 A TC = 100 °C 1.25 Pulsed Drain Current 1 IDM 8 Avalanche Current IAS 2 Avalanche Energy L = 3mH, ID=2A, RG=25Ω EAS 6 mJ Repetitive Avalanche Energy 2 L = 0.5mH EAR 1 Power Dissipation TC = 25 °C PD 30 W TC = 100 °C 12 Operating Junction & Storage Temperature Range Tj, Tstg ‐55 to 150 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNIT Junction‐to‐Case RJC 4.2 °C / W Junction‐to‐Ambient RJA 110 1Pulse width limited by maximum junction temperature. 2Duty cycle 1% |
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