FP6808-29CS5P datasheet(7/8 Pages) FITIPOWER

7 / 8 page

FP6808-1.3-DEC-2012

FP6808

fitipower integrated technology lnc.

Application Information

Benefits of Highly Accurate Reset Threshold

Most microprocessor supervisor ICs has reset

threshold voltages between 5% and 10% below the

value of nominal supply voltages.

This ensures a

reset will not occur within 5% of the nominal supply,

but will occur when supply is 10% below nominal.

other words, the reset is guaranteed to assert after

the power supply falls out of regulation, but keeps

inactive even when power is at the minimum

specified operating voltage of the system ICs.

Negative-Going VDD Transients

In addition to issuing a reset to microprocessor during

power-up, power-down and brownout conditions,

FP6808

relatively

immune

short-duration

negative-going VCC transients (glitches).

Figure 11

shows typical transient duration vs. reset comparator

overdrive, for which the FP6808 does not generate a

reset signal.

The graph was generated by using a

negative-going pulse applied to VDD, as shown in

Figure 12, starting 0.5V above the actual reset

threshold and ending below it by the magnitude

indicated (reset comparator over-drive).

The graph

indicates

that

the

maximum

pulse

width

negative-going VDD transient can have without

causing a reset signal.

As the reset comparator

overdrive increases, the maximum allowable pulse

width decreases.

A typical 0.1

μF bypass capacitor

mounted as close to the VDD pin as possible provides

additional transient immunity.

Figure 11. Maximum Transient Durations Without Causing

a Reset Pulse vs. Reset Comparator Overdrive

Figure 12. The VDD with Negative Going Transients

Ensuring a Valid Reset Output Down to VDD=0

When VDD falls below 1V, the FP6808 no longer

sinks current, it will become an open circuit.

Therefore, high-impedance CMOS logic inputs

connected to OUT can drift to undetermined

voltages.

This presents no problem in most

applications

for

microprocessor’s

inoperative

condition with VDD below 1V.

However, in

applications where OUT must be valid down to 0V,

adding a pull-down resistor to OUT causes stray

leakage currents to flow to ground, providing some

impedance between OUT and ground (Figure 13).

R1 is recommended around 100kΩ.

FP6808

µP

OUT

VDD

GND

RESET

INPUT

GND

VDD

100K

Figure 13. OUT Valid to VDD=Ground Circuit

Interfacing to

μPs with Bidirectional Reset Pins

Since the output of FP6808N is open drain, this

device interfaces easily with microprocessor that

has bidirectional reset pins.

Connecting the

FP6808

N’s output directly to the micro-controller’s

RESET pin with a single pull-up resistor allows

either device to assert reset (Figure 14).

FP6808-N

µP

OUT

VDD

GND

RESET

INPUT

GND

VDD

Figure 14. Interfacing to

μPs with Bidirectional Reset I/O

100

200

300

400

500

100

120

Reset Comparator Overdrive(mV)

VTH

Duration

Overdrive

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