GPR25L3203F datasheet(4/47 Pages) GENERALPLUS

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GPR25L3203F

Proprietary & Confidential

Jul. 09, 2015

Version: 1.0

3V, 32M-BIT [x 1/x 2/x 4] CMOS MXSMIO

(SERIAL MULTI I/O) FLASH MEMORY

1. FEATURES

1.1. GENERAL

• Supports Serial Peripheral Interface -- Mode 0 and Mode 3

• 33,554,432 x 1 bit structure or 16,777,216 x 2 bits (two I/O

read mode) structure or 8,388,608 x 4 bits (four I/O mode)

structure

• 1024 Equal Sectors with 4K bytes each

Any Sector can be erased individually

• 128 Equal Blocks with 32K bytes each

Any Block can be erased individually

• 64 Equal Blocks with 64K bytes each

Any Block can be erased individually

• Power Supply Operation

2.65 ~ 3.6 volt for read, erase, and program operations

• Latch-up protected to 100mA from -1V to Vcc +1V

1.2. PERFORMANCE

• High Performance

VCC = 2.65~3.6V

Normal read

50MHz

Fast read

FAST_READ, DREAD, QREAD: 133MHz with 8 dummy

cycles

2READ: 104MHz with 4 dummy cycle, 133MHz with 8

dummy cycle

4READ: 104MHz with 6 dummy cycle, 133MHz with 10

dummy cycle

Configurable dummy cycle number for 2READ and 4READ

operation

8/16/32/64 byte Wrap-Around Burst Read Mode

• Low Power Consumption

• Typical 100,000 erase/program cycles

1.3. SOFTWARE FEATURES

• Input Data Format

1-byte Command code

• Advanced Security Features

Block Lock Protection

The BP0-BP3 and T/B status bits define the site of the area to be

protected against program and erase instructions.

• Additional 4K bits secured OTP

Features unique identifier

Factory locked identifiable and customer lockable

• Auto Erase and Auto Program Algorithms

Automatically erases and verifies data at selected sector

Automatically programs and verifies data at selected page

by an internal algorithm that automatically times the

program pulse width (Any page to be programmed should

have page in the erased state first.)

• Status Register Feature

• Command Reset

• Program/Erase Suspend

• Program/Erase Resume

• Electronic Identification

JEDEC 1-byte Manufacturer ID and 2-byte Device ID

RES command for 1-byte Device ID

• Support Serial Flash Discoverable Parameters (SFDP) mode

1.4. HARDWARE FEATURES

• SCLK Input

Serial clock input

• SI/SIO0

Serial Data Input or Serial Data Input/Output for 2 x I/O

mode or Serial Data Input/Output for 4 x I/O mode

• SO/SIO1

Serial Data Output or Serial Data Input/Output for 2 x I/O

mode or Serial Data Input/Output for 4 x I/O mode

• WP#/SIO2

Hardware write protection or serial data Input/Output for 4 x

I/O mode

• HOLD#/SIO3

To pause the device without deselecting the device or serial

data Input/Output for 4 x I/O mode

• PACKAGE

8-pin SOP (200mil)

All devices are RoHS Compliant and Halogen-free

2. GENERAL DESCRIPTION

GPR25L3203F is 32Mb bits Serial Flash memory, which is

configured as 4,194,304 x 8 internally. When it is in four I/O mode,

the structure becomes 8,388,608 bits x 4. When it is in two I/O

mode, the structure becomes 16,777,216 bits x 2. GPR25L3203F

features a serial peripheral interface and software protocol

allowing operation on a simple 3-wire bus while it is in single I/O

mode. The three bus signals are a clock input (SCLK), a serial

data input (SI), and a serial data output (SO). Serial access to the

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