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IR2213 Datasheet(PDF) 2 Page - International Rectifier

Part # IR2213
Description  HIGH AND LOW SIDE DRIVER
PDF  14 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR2213 Datasheet(HTML) 2 Page - International Rectifier

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IR2213(S) & (PbF)
Symbol
Definition
Min.
Max.
Units
VB
High Side Floating Supply Voltage
-0.3
1225
VS
High Side Floating Supply Offset Voltage
VB - 25
VB + 0.3
VHO
High Side Floating Output Voltage
VS - 0.3
VB + 0.3
VCC
Low Side Fixed Supply Voltage
-0.3
25
VLO
Low Side Output Voltage
-0.3
VCC + 0.3
VDD
Logic Supply Voltage
-0.3
VSS + 25
VSS
Logic Supply Offset Voltage
VCC - 25
VCC + 0.3
VIN
Logic Input Voltage (HIN, LIN & SD)
VSS - 0.3
VDD + 0.3
dVs/dt
Allowable Offset Supply Voltage Transient (Figure 2)
—
50
V/ns
PD
Package Power Dissipation @ TA ≤ +25°C
(14 Lead PDIP)
—
1.6
(16 Lead SOIC)
—
1.25
RTHJA
Thermal Resistance, Junction to Ambient
(14 Lead PDIP)
—
75
(16 Lead SOIC)
—
100
TJ
Junction Temperature
—
125
TS
Storage Temperature
-55
150
TL
Lead Temperature (Soldering, 10 seconds)
—
300
Symbol
Definition
Min.
Max.
Units
VB
High Side Floating Supply Absolute Voltage
VS + 12
VS + 20
VS
High Side Floating Supply Offset Voltage
Note 1
1200
VHO
High Side Floating Output Voltage
VS
VB
VCC
Low Side Fixed Supply Voltage
12
20
VLO
Low Side Output Voltage
0
VCC
VDD
Logic Supply Voltage
VSS + 3
VSS + 20
VSS
Logic Supply Offset Voltage
-5 (Note 2)
5
VIN
Logic Input Voltage (HIN, LIN & SD)
VSS
VDD
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential.
Note 1: Logic operational for VS of -5 to +1200V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When VDD<5V, the minimum VSS offset is limited to -VDD
°C/W
W
V
V
°C



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