1

OC

13

CLK

11

10D

10

9D

9

8D

8

7D

7

6D

6

5D

5

4D

4

3D

3

2D

1D

2

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

9Q

10Q

23

22

21

20

19

18

17

16

15

14

C1

1D

C1

1D

C1

1D

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

’AS822 logic diagram positive logic

SN54AS822, SN74AS822

10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

SDAS230 – D2825, DECEMBER 1983 – REVISED JANUARY 1986

POST OFFICE BOX 655303

3

’AS822 FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OC

CLK

D

Q

L

↑

H

H

L

↑

LL

L

LX

Q0

H

X

X

Z

2

1D

2D

3

3D

4

4D

5

5D

6

6D

7

7D

8

8D

9

9D

10

10D

11

14

15

16

17

18

19

20

21

22

23

1D

CLK

13

OC

1

C1

EN

10Q

9Q

8Q

7Q

6Q

5Q

4Q

3Q

2Q

1Q

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

Pin numbers shown are for DW, JT, and NT packages.