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C9827H
High Performance Pentium® 4 Clock Synthesizer
Cypress Semiconductor Corporation
http://www.cypress.com
Document#: 38-07106 Rev. *A
12/26/2002
Page 8 of 25
Approved Product
AC Parameters (Cont.)
66 MHz
100 MHz
133 MHz
200 MHz
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Min
Max
Units
Notes
TDC
66B(0:2) Duty
Cycle
45
55
45
55
45
55
45
55
%
2, 4
Tr / Tf
66B(0:2) rise and
fall times
0.5
2.0
0.5
2.0
0.5
2.0
0.5
2.0
nS
2, 3
TSKEW
Any 66B to any
66B Skew
-
175
-
175
-
175
175
pS
2, 4
Tpd
66IN to 66B(0:2)
propagation delay
2.5
4.5
2.5
4.5
2.5
4.5
2.5
4.5
nS
2, 4
TCCJ
66B(0:2) Cycle to
Cycle Jitter
-
100
-
100
-
100
-
100
pS
2, 4, 18
TDC
PCI_F(0:2) PCI
(0:6) Duty Cycle
45
55
45
55
45
55
45
55
%
2, 4
TPeriod
PCI_F(0:2) PCI
(0:6) period
30.0
-
30.0
-
30.0
-
30
-
nS
1, 2, 4
THIGH
PCI_F(0:2) PCI
(0:6) high time
12.0
-
12.0
-
12.0
-
12.0
-
nS
19
TLOW
PCI_F(0:2) PCI
(0:6) low time
12.0
-
12.0
-
12.0
-
12.0
-
nS
20
Tr / Tf
PCI_F(0:2) PCI
(0:6) rise and fall
times
0.5
2.0
0.5
2.0
0.5
2.0
0.5
2.0
nS
3
TSKEW
Any PCI clock to
Any PCI clock
Skew
-
500
-
500
-
500
-
500
pS
2, 4
TCCJ
PCI_F(0:2) PCI
(0:6) Cycle to
Cycle Jitter
-
250
-
250
-
250
-
250
pS
2, 4
TDC
USB48M Duty
Cycle
45
55
45
55
45
55
45
55
%
2, 4
TPeriod
USB48M period
20.8299
20.8333
20.8299
20.8333
20.8299
20.8333
20.8299
20.8333
nS
2, 4
Tr / Tf
USB48M rise and
fall times
1.0
2.0
1.0
2.0
1.0
2.0
1.0
2.10
nS
2, 3
TCCJ
USB48M Cycle to
Cycle Jitter
-
350
-
350
-
350
-
350
pS
1, 2, 4
TDC
DOT48 Duty
Cycle
45
55
45
55
45
55
45
55
%
2, 4
TPeriod
DOT48 period
20.837
20.837
20.837
20.837
nS
2, 4
Tr / Tf
DOT48 rise and
fall times
0.5
1.0
0.5
1.0
0.5
1.0
0.5
1.0
nS
2, 4
TCCJ
DOT48Cycle to
Cycle Jitter
-
350
-
350
-
350
-
350
pS
2, 4
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