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TMS320DM643 Datasheet(PDF) 127 Page - Texas Instruments |
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TMS320DM643 Datasheet(HTML) 127 Page - Texas Instruments |
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127 / 160 page  www.ti.com 5.13 Video Port 5.13.1 Video Port Device-Specific Information 5.13.2 Video Port Peripheral Register Description(s) TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005 Each Video Port is capable of sending and receiving digital video data. The Video Ports are also capable of capturing/displaying RAW data. The Video Port peripherals follow video standards such as BT.656 and SMPTE296. The TMS320DM643 device has two video port peripherals. The video port peripheral can operate as a video capture port, video display port, or as a transport stream interface (TSI) capture port. The port consists of two channels: A and B. A 5120-byte capture/display buffer is splittable between the two channels. The entire port (both channels) is always configured for either video capture or display only. Separate data pipelines control the parsing and formatting of video capture or display data for each of the BT.656, Y/C, raw video, and TSI modes. For video capture operation, the video port may operate as two 8/10-bit channels of BT.656 or raw video capture; or as a single channel of 8/10-bit BT.656, 8/10-bit raw video, 16/20-bit Y/C video, 16/20-bit raw video, or 8-bit TSI. For video display operation, the video port may operate as a single channel of 8/10-bit BT.656; or as a single channel of 8/10-bit BT.656, 8/10-bit raw video, 16/20 bit Y/C video, or 16/20-bit raw video. It may also operate in a two channel 8/10-bit raw mode in which the two channels are locked to the same timing. Channel B is not used during single channel operation. Note: The following Video Port mode currently is not supported: • 8-Bit Transport Stream Interface (TSI) capture port [TSI currently not supported] For more detailed information on the DM643 Video Port peripherals, see the TMS320C64x DSP Video Port/VCXO Interpolated Control (VIC) Port Reference Guide (literature number SPRU629). Table 5-51. Video Port 1 and 2 (VP1 and VP2) Control Registers HEX ADDRESS RANGE ACRONYM DESCRIPTION VP1 VP2 01C4 4000 01C4 8000 VP_PIDx Video Port Peripheral Identification Register 01C4 4004 01C4 8004 VP_PCRx Video Port Peripheral Control Register 01C4 4008 01C4 8008 – Reserved 01C4 400C 01C4 800C – Reserved 01C4 4020 01C4 8020 VP_PFUNCx Video Port Pin Function Register 01C4 4024 01C4 8024 VP_PDIRx Video Port Pin Direction Register 01C4 4028 01C4 8028 VP_PDINx Video Port Pin Data Input Register 01C4 402C 01C4 802C VP_PDOUTx Video Port Pin Data Output Register 01C4 4030 01C4 8030 VP_PDSETx Video Port Pin Data Set Register 01C4 4034 01C4 8034 VP_PDCLRx Video Port Pin Data Clear Register 01C4 4038 01C4 8038 VP_PIENx Video Port Pin Interrupt Enable Register 01C4 403C 01C4 803C VP_PIPOx Video Port Pin Interrupt Polarity Register 01C4 4040 01C4 8040 VP_PISTATx Video Port Pin Interrupt Status Register 01C4 4044 01C4 8044 VP_PICLRx Video Port Pin Interrupt Clear Register 01C4 40C0 01C4 80C0 VP_CTLx Video Port Control Register 01C4 40C4 01C4 80C4 VP_STATx Video Port Status Register DM643 Peripheral Information and Electrical Specifications 127 |
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