TMS320DM643 datasheet(147/160 Pages) TI

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5.18

General-Purpose Input/Output (GPIO)

5.18.1

GPIO Device-Specific Information

TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

The GPIO peripheral provides dedicated general-purpose pins that can be configured as either inputs or

outputs. When configured as an output, you can write to an internal register to control the state driven on

the output pin. When configured as an input, you can detect the state of the input by reading the state of

an internal register.

In addition, the GPIO peripheral can produce CPU interrupts and EDMA events in different interrupt/event

generation modes.

To use the GP[15:0] software-configurable GPIO pins, the GPxEN bits in the GP Enable (GPEN) Register

and the GPxDIR bits in the GP Direction (GPDIR) Register must be properly configured.

GPxEN = 1

GP[x] pin is enabled

GPxDIR = 0

GP[x] pin is an input

GPxDIR = 1

GP[x] pin is an output

where "x" represents one of the 15 through 0 GPIO pins

Figure 5-64 shows the GPIO enable bits in the GPEN register for the DM643 device. To use any of the

GPx pins as general-purpose input/output functions, the corresponding GPxEN bit must be set to "1"

(enabled). Default values are device-specific, so refer to Figure 5-64 for the DM643 default configuration.

Reserved

R-0

GP15

GP14

GP13

GP12

GP11

GP10

GP9

GP8

GP7

GP6

GP5

GP4

GP3

GP2

GP1

GP0

R/W-0

R/W-1

R/W-0

R/W-1

Legend: R/W = Readable/Writable, -n = value after reset, -x = undefined value after reset

Figure 5-64. GPIO Enable Register (GPEN) [Hex Address: 01B0 0000]

Figure 5-65 shows the GPIO direction bits in the GPDIR register. This register determines if a given GPIO

pin is an input or an output providing the corresponding GPxEN bit is enabled (set to "1") in the GPEN

DM643 Peripheral Information and Electrical Specifications

147

TMS320DM643 Datasheet(PDF) 147 Page - Texas Instruments

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