| Electronic Components Datasheet Search |
|
SN74HCS74-Q1 Datasheet(PDF) 1 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
SN74HCS74-Q1 Datasheet(HTML) 1 Page - Texas Instruments |
|
1 / 19 page ![]() Input Voltage Schmitt-trigger CMOS Input Response Waveforms Standard CMOS Input Response Waveforms Input Voltage Input Voltage Time Time Input Voltage Waveforms Low Power Noise Rejection Supports Slow Inputs Time Time Time Time Product Folder Order Now Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74HCS74-Q1 SCES894A – APRIL 2019 – REVISED JUNE 2019 SN74HCS74-Q1 Automotive Qualified Schmitt-Trigger Input Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 1 1 Features 1 • AEC-Q100 Qualified for automotive applications: – Device temperature grade 1: –40°C to +125°C, TA – Device HBM ESD Classification Level 2 – Device CDM ESD Classifcation Level C6 • Wide operating voltage range: 2 V to 6 V • Schmitt-trigger inputs allow for slow or noisy input signals • Low power consumption – Typical ICC of 100 nA – Typical input leakage current of ±100 nA • ±7.8-mA output drive at 5 V 2 Applications • Convert a momentary switch to a toggle switch • Hold a signal during controller reset • Input slow edge-rate signals • Operate in noisy environments • Divide a clock signal by two 3 Description The SN74HCS74-Q1 device contains two independent D-type positive-edge-triggered flip-flops. All inputs include Schmitt triggers, allowing for slow or noisy input signals. A low level at the preset (PRE) input sets the output high. A low level at the clear (CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q, Q) on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the input clock (CLK) signal. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q, Q). Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HCS74QPW RQ1 TSSOP (14) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Benefits of Schmitt-trigger Inputs |
Similar Part No. - SN74HCS74-Q1 |
|
Similar Description - SN74HCS74-Q1 |
|
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |