AX88655AB datasheet(10/33 Pages) ASIX

10 / 33 page

ASIX ELECTRONICS CORPORATION

AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch

CONFIDENTIAL

CLK_80IN

L19

System clock input :85~90M

Frequency 1 input, must pull high with 4.7K ohm resistor

M19

Frequency 2 input from PHY 125M clock source.

F2_CTL

Frequency 2 input enable, must pull low with 4.7K ohm resistor

X_IN

M20

Crystal or OSC 25MHz Input: This is a clock source of internal PLL.

X_OUT

L20

Crystal 25MHz Output: This pin should be floating with single-ended

external clock.

/RST

Reset: Active Low

MDIO

I/O/PU

Station Management Data In/Out: PHY Management Data Input and

Output.

MDC

Station Management Data Clock Out: PHY Management Clock.

SDIO

I/O/PU

EEPROM Data In/Out: EEPROM Serial Data Input and Output.

SDC

I/O/PU

EEPROM Data Clock In/Out: EEPROM Serial Clock. (Note: It is

output pin if the embedded MPU is active; otherwise as input pin)

SID[4:0]

I/PD

I/UP

F2, F1,

E4, E3, E2

Switch ID: MPU can identify the switch and PHYs with this ID.

Default is “00011b”.

GPIO[4:0]

I/O/PU

K3, K2,

K1, J4, J3

General Purpose I/O: The 5 GPIOs can be programmed for special

application. (Note: The function is not released to user normally. Please

contact with ASIX directly if any requirement)

VDD33

D6, D13, G4,

J17, P4, U7

3.3V +/-5% Supply Voltage.

VDD18

D7, H4, N4,

N17, U8, U13

1.8V +/-5% Supply Voltage.

AVDD18

M17, L17, K17 1.8V +/-5% Supply Voltage for PLL.

VSS

D12, J9, J10,

J11, J12, K4,

K9, K10, K11,

K12, L4, L9,

L10, L11,

L12,, M9,

M10, M11,

M12, N18,

U15, M18,

L18, K18

Ground

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