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TMP61

SBOS921C – DECEMBER 2018 – REVISED SEPTEMBER 2019

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Copyright © 2018–2019, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The TMP61 series of silicon linear thermistors has a linear positive temperature coefficient (PTC) that results in a

uniform and consistent temperature coefficient resistance (TCR) across a wide operating temperature range.

8.2 Functional Block Diagram

Figure 10. Typical Implementation Circuits

8.3 Feature Description

As shown in Figure 1 and Figure 2, the TMP61 has good linear behaviour across the whole temperature range,

but a small non-linearity can be observed, as well as supply dependence, as shown in Figure 3 and Figure 4. To

fabricate the TMP61, the engineer can use a special silicon process where the device key characteristics—the

temperature coefficient resistance (TCR) and nominal resistance (R25)—are controlled by the doping level and

active region area. Note that the TMP61 has an active area and a substrate due to the polarized terminals of the

device. The positive terminal should be connected to the highest potential, while the negative terminal (which is

tied to the substrate internally) should be connected to the lowest potential. and Equation 1 can help the user

approximate the device resistance and TCR. Table 1, Table 2, Table 4, and Table 5 show the typical resistance,

resistance spread, and maximum expected error across temperature using a direct ideal bias current or an ideal

voltage bias in a divider circuit.

DEC Package: R (Ω) ≈ 8490.69 + 55.24 T + 0.1541 T

LPG Package: R (Ω) ≈ 8535.76 + 54.79454 T + 0.14982 T

DYA Package: R (Ω) ≈ 8485.75 + 53.65 T + 0.145 T

where

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T is the temperature of interest

(1)

Below are the definitions of the key terms used throughout this document:

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