SAM5708B datasheet(24/89 Pages) ETC1

24 / 89 page

SAM5708B

SAM5708B.pdf

– Rev 14/05/2018

Pin name

Pin#

Type

Mem

Cfg

Description

RX_ER

In MEM

RMII Receive Error Output from the Ethernet PHY.

XCLBD1

In MEM

Optional clock bit for digital audio inputs DAAD[7:0]. Used

for sampling rate conversion, for external incoming digital

audio.

P8.2_IntB

I/O MEM

General purpose I/O pin.

External Interrupt source IntB.

RXD0

In MEM

RMII Receive Data Output 0 from the Ethernet PHY.

DAAD6

In MEM

Stereo audio digital input 6, I2S or MSB format. Can

operate on CLBD master rate or XCLBD external rate.

P8.3

I/O MEM

General purpose I/O pin.

RXD1

In MEM

RMII Receive Data Output 1 from the Ethernet PHY.

DAAD7

In MEM

Stereo audio digital input 7, I2S or MSB format. Can

operate on CLBD master rate or XCLBD external rate.

P8.4

I/O MEM

General purpose I/O pin.

CRS_DV

In MEM

RMII Carrier Sense/Receive Data Valid Output from the

Ethernet PHY

DABD6

Out MEM

Stereo audio digital output 6, I2S or MSB format.

P8.5

I/O MEM

General purpose I/O pin.

TXD0

Out MEM

RMII Transmit Data 0 to the Ethernet PHY.

DABD7

Out MEM

Stereo audio digital output 7, I2S or MSB format.

P8.6

I/O MEM

General purpose I/O pin.

TXD1

Out MEM

RMII Transmit Data 1 to the Ethernet PHY.

SPICS2/

Out MEM

Chip select 2 for Multi-purpose Quad SPI interface. Need

external 100k pull-up resistor if firmware is in device

selected by SPICS0/.

P8.7

I/O MEM

General purpose I/O pin.

TX_EN

Out MEM

RMII Transmit Enable to the Ethernet PHY.

SPICS3/

Out MEM

Chip select 3 for Multi-purpose Quad SPI interface. Need

external 100k pull-up resistor if firmware is in device

selected by SPICS0/.

P8.8

I/O MEM

General purpose I/O pin.

4.3.5. Host Parallel Interface as primary function

Pin name

Pin#

Type

Mem

Cfg

Description

D0-D7

111-117

I/O DR8

1,2,5

Host parallel interface data. Output if CS/ and RD/ are low

(read from chip), input if CS/ and WR/ are low (write to

chip). Type of data defined by A0-A1 address input.

118

I/O DR4

DAAD2

111

In 5VT

1,2,5

Stereo audio digital input 2, I2S or MSB format.

DABD4

112

Out DR8

1,2,5

Stereo audio digital output 4, I2S or MSB format.

DABD3

113

Out DR8

1,2,5

Stereo audio digital output 3, I2S or MSB format.

DABD2

114

Out DR8

1,2,5

Stereo audio digital output 2, I2S or MSB format.

XWSBD1

115

In 5VT

1,2,5

External

word sel. Clock

1 for digital audio inputs

DAAD[7:0].

XCLBD1

116

In 5VT

1,2,5

External clock bit 1 for digital audio inputs DAAD[7:0].

XWSBD0

117

In 5VT

1,2,5

- External word select clock 0 for digital audio inputs

DAAD[7:0].

- Word Clock input for audio sync. on external clock device.

XCLBD0

118

1,2,5

External clock bit for digital audio inputs DAAD[7:0].

P0.0-P0.6

111-117

I/O 5VT

DR8

1,2,5

General purpose I/O pins. Can be individually programmed

as input or output.

P0.7

118

I/O DR4

1,2,5

General purpose I/O pin.

SAM5708B Datasheet(PDF) 24 Page - List of Unclassifed Manufacturers

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