18

Integrated

Circuit

Systems, Inc.

ICS950208

0464B—08/04/03

All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no

defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard

skew described below as Tpci.

Un-Buffered Mode 3V66 & PCI Phase Relationship

3V66

PCICLK_F and PCICLK

Tpci