LPC47M112 datasheet(3/208 Pages) SMSC

3 / 208 page

Enhanced Super I/O Controller with LPC Interface

Datasheet

SMSC DS – LPC47M112

Page 4

Rev. 02/02/2005

DATASHEET

Table of Contents

General Description .............................................................................................. 8

PIN CONFIGURATION ........................................................................................... 9

DESCRIPTION OF PIN FUNCTIONS ................................................................... 10

3.1

Buffer Type Descriptions................................................................................................................................14

3.2

Pins That Require External Pullup Resistors................................................................................................14

BLOCK DIAGRAM ............................................................................................... 15

REFERENCE DOCUMENTS ................................................................................ 16

3 VOLT OPERATION / 5 VOLT TOLERANCE..................................................... 17

POWER FUNCTIONALITY................................................................................... 18

7.1

VCC Power .......................................................................................................................................................18

7.2

VTR Support ....................................................................................................................................................18

7.3

Internal PWRGOOD .........................................................................................................................................18

7.4

32.768 kHz Trickle Clock Input .......................................................................................................................18

7.5

Indication of 32kHz Clock ...............................................................................................................................18

7.6

Trickle Power Functionality............................................................................................................................19

7.7

VREF Pin ..........................................................................................................................................................20

7.8

Maximum Current Values ...............................................................................................................................20

7.9

Power Management Events (PME/SCI) ..........................................................................................................20

FUNCTIONAL DESCRIPTION ............................................................................. 21

8.1

Super I/O Registers .........................................................................................................................................21

8.2

Host Processor Interface (LPC) .....................................................................................................................21

8.3

LPC INTERFACE..............................................................................................................................................21

8.3.1

LPC Interface Signal Definition.........................................................................................................................................21

8.3.2

LPC Cycles .......................................................................................................................................................................22

8.3.3

Field Definitions ................................................................................................................................................................22

8.4

Power Management.........................................................................................................................................23

8.4.1

CLOCKRUN Protocol .......................................................................................................................................................23

8.4.2

Typical Usage ...................................................................................................................................................................23

8.4.3

SYNC Timeout..................................................................................................................................................................23

8.4.4

SYNC Patterns and Maximum Number of SYNCS...........................................................................................................23

8.4.5

SYNC Error Indication ......................................................................................................................................................23

8.5

LPC Transfer Sequence Examples ................................................................................................................25

8.5.1

Wait State Requirements..................................................................................................................................................25

FLOPPY DISK CONTROLLER ............................................................................ 26

9.1

FDC Internal Registers....................................................................................................................................26

COMMAND SET/DESCRIPTIONS ....................................................................... 42

INSTRUCTION SET.............................................................................................. 45

SERIAL PORT (UART)......................................................................................... 64

Serial Data............................................................................................................ 68

INFRARED INTERFACE ...................................................................................... 77

MPU-401 MIDI UART............................................................................................ 78

15.1

Overview.......................................................................................................................................................78

15.2

Host Interface...............................................................................................................................................78

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