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CS4364 Datasheet(PDF) 15 Page - Cirrus Logic |
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CS4364 Datasheet(HTML) 15 Page - Cirrus Logic |
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15 / 50 page  DS619A1 15 CS4364 SWITCHING CHARACTERISTICS - DSD (Logic 0 = AGND = DGND; Logic 1 = VLS; CL =30pF) Parameter Symbol Min Typ Max Unit MCLK Duty Cycle 40 - 60 % DSD_SCLK Pulse Width Low tsclkl 160 - - ns DSD_SCLK Pulse Width High tsclkh 160 - - ns DSD_SCLK Frequency (64x Oversampled) (128x Oversampled) 1.024 2.048 - - 3.2 6.4 MHz MHz DSD_A / _B valid to DSD_SCLK rising setup time tsdlrs 20 - - ns DSD_SCLK rising to DSD_A or DSD_B hold time tsdh 20 - - ns DSD clock to data transition (Phase Modulation mode) tdpm -20 - 20 ns sclkh t sclkl t DSDxx DSD_SCLK sdlrs t sdh t Figure 3. Direct Stream Digital - Serial Audio Input Timing dpm t DSDxx DSD_SCLK (64Fs) DSD_SCLK (128Fs) dpm t Figure 4. Direct Stream Digital - Serial Audio Input Timing for Phase Modulation Mode |
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