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RM0016 Datasheet(PDF) 154 Page - STMicroelectronics |
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RM0016 Datasheet(HTML) 154 Page - STMicroelectronics |
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154 / 467 page  16-bit advanced control timer (TIM1) RM0016 154/467 DocID14587 Rev 14 17.4.4 External clock source mode 2 The counter can count at each rising or falling edge on the ETR. This mode is selected by writing ECE = 1 in the TIM1_ETR register. The Figure 47 gives an overview of the external trigger input block. Figure 47. External trigger input block diagram Procedure Use the following procedure to configure the up-counter and, for example, to count once every two rising edges on the ETR: 1. As no filter is needed in this example, write ETF[3:0] = 0000 in the TIM1_ETR register. 2. Set the prescaler by writing ETPS[1:0] = 01 in the TIM1_ETR register. 3. Select rising edge detection on the ETR pin by writing ETP = 0 in the TIM1_ETR register. 4. Enable external clock mode 2 by writing ECE = 1 in the TIM1_ETR register. 5. Enable the counter by writing CEN = 1 in the TIM1_CR1 register. The counter counts once every two ETR rising edges. The delay between the rising edge on the ETR and the actual reset of the counter is due to the resynchronization circuit on the external trigger signal (ETRP). Figure 48. Control circuit in external clock mode 2 |
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