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TLV9042IDDFR Datasheet(PDF) 7 Page - Texas Instruments |
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TLV9042IDDFR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 25 page ![]() 7 TLV9042 www.ti.com SBOS836 – MARCH 2020 Product Folder Links: TLV9042 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Electrical Characteristics (continued) For VS = (V+) – (V–) = 1.2 V to 5.5 V (±0.6 V to ±2.75 V) at TA = 25°C, RL = 100 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (1) Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level. (2) Full shutdown refers to the dual TLV9042S having both channels 1 and 2 disabled (SHDN1 = SHDN2 = V–) and the quad TLV9044S having all channels 1 to 4 disabled (SHDN12 = SHDN34 = V–). For partial shutdown, only one SHDN pin is exercised; in this mode, the internal biasing circuitry remains operational and the enable time is shorter. Voltage output swing from rail Positive rail headroom VS = 1.2 V, RL = 100 k Ω 1 1.32 mV VS = 5.5 V, RL = 10 k Ω 20 30 VS = 5.5 V, RL = 100 k Ω 5 8 Negative rail headroom VS = 1.2 V, RL = 100 k Ω 1.03 1.35 VS = 5.5 V, RL = 10 k Ω 20 30 VS = 5.5 V, RL = 100 k Ω 5 8 ISC Short-circuit current VS = 5.5 V ±40 mA POWER SUPPLY IQ Quiescent current per amplifier VS = 5.5 V, IO = 0 A 10 13 µA TA = –40°C to 125°C 15 Turn-on time At TA = 25°C, VS = 5.5 V, VS ramp rate > 0.3 V/µs 125 μs SHUTDOWN IQSD Quiescent current per amplifier All amplifiers disabled, SHDN = V– 0.3 1.5 µA ZSHDN Output impedance during shutdown Amplifier disabled 43 || 11.5 GΩ || pF VIH Logic high threshold voltage (amplifier enabled) (V–) + 1 V V VIL Logic low threshold voltage (amplifier disabled) (V–) + 0.2 V V tON Amplifier enable time (full shutdown) (1) (2) G = +1, VCM = V–, VO = 0.1 × VS / 2 160 µs Amplifier enable time (partial shutdown) (1) (2) G = +1, VCM = V–, VO = 0.1 × VS / 2 120 tOFF Amplifier disable time (1) VCM = V–, VO = VS / 2 10 µs SHDN pin input bias current (per pin) (V+) ≥ SHDN ≥ (V–) + 1 V 100 pA (V–) ≤ SHDN ≤ (V–) + 0.2 V 50 |
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