5

INA821

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SBOS893D – AUGUST 2018 – REVISED JUNE 2020

Product Folder Links: INA821

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Copyright © 2018–2020, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage

–20

20

V

Signal input pins

Voltage

–40

40

V

REF pin

–20

20

Signal output pins

V

Continuous

–50

150

°C

175

–65

150

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±1500

V

±750

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Single-supply

4.5

36

V

Dual-supply

±2.25

±18

Specified temperature

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.4 Thermal Information

INA821

UNIT

D (SOIC)

DGK (VSSOP)

DRG (WSON)

8 PINS

8 PINS

8 PINS

Junction-to-ambient thermal resistance

119.6

215.4

55.6

°C/W

Junction-to-case (top) thermal resistance

66.3

66.3

57.9

°C/W

Junction-to-board thermal resistance

61.9

97.8

28.6

°C/W

Junction-to-top characterization parameter

20.5

10.5

1.8

°C/W

Junction-to-board characterization parameter

61.4

96.1

28.6

°C/W

Junction-to-case (bottom) thermal resistance

N/A

N/A

12.1

°C/W