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1EDI2004AS Datasheet(PDF) 21 Page - Infineon Technologies AG |
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1EDI2004AS Datasheet(HTML) 21 Page - Infineon Technologies AG |
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21 / 138 page ![]() Data Sheet 21 Rev. 2.0 2019-01-16 EiceDRIVERTM SIL 1EDI2004AS Functional Description 2.4.4 SPI Interface This chapter describes the functionality of the SPI block. 2.4.4.1 Overview The standard SPI interface implemented on the 1EDI2004AS is compatible with most of the microcontrollers available for automotive and industrial applications. The following features are supported by the SPI interface: • Full-duplex bidirectional communication link. •SPI Slave mode (only). • 16-bit frame format. • Daisy chain capability. •MSB first. • Parity Check (optional) and Parity Bit generation (LSB). The SPI interface of the 1EDI2004AS provides a standardized bidirectional communication interface to the main microcontroller. From the architectural point of view, it fulfills the following functions: • Initialization of the device. • Configuration of the device (static and runtime). • Reading of the status of the device (static and runtime). • Operation of the verification modes of the device. The purpose of the SPI interface is to exchange data which have relaxed timing constraints compared to the PWM signals (from the point of view of the motor control algorithm). The IGBT switching behavior is for example controlled directly by the PWM input. Similarly, critical application failures requiring fast reaction are notified on the primary side via the feedback signals NFLTA, NFLTB and NRST/RDY. In order to minimize the complexity of the end-application and to optimize the microcontroller’s resources, the implemented interface has daisy chain capability. Several (typically 6) 1EDI2004AS devices can be combined into a single SPI bus. |
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