KSZ8893FQL datasheet(49/109 Pages) MICROCHIP

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KSZ8893FQL

DS00003038B-page 48

 2019 Microchip Technology Inc.

Pause

Link partner pause capability

Reg. 30, bit 4

Reg. 46, bit 4

Reserved

—

Adv 100 Full

Link partner 100 full-duplex capability

Reg. 30, bit 3

Reg. 46, bit 3

Adv 100 Half

Link partner 100 half-duplex capability

Reg. 30, bit 2

Reg. 46, bit 2

Adv 10 Full

Link partner 10 full-duplex capability

Reg. 30, bit 1

Reg. 46, bit 1

Adv 10 Half

Link partner 10 half-duplex capability

Reg. 30, bit 0

Reg. 46, bit 0

4-0

Reserved

—

00000

—

PHY1 Register 29 (PHYAD = 0x1, REGAD = 0x1D): LINKMD Control/Status

PHY2 Register 29 (PHYAD = 0x2, REGAD = 0x1D): LINKMD Control/Status

Vct_enable

R/W

(SC)

1 = Enable cable diagnostic. After VCT test

has completed, this bit will be self-cleared.

0 = Indicate cable diagnostic test (if enabled)

has completed and the status information is

valid for read.

Reg. 26, bit 4

Reg. 42, bit 4

14-13

Vct_result

00 = Normal condition

01 = Open condition detected in cable

10 = Short condition detected in cable

11 = Cable diagnostic test has failed

Reg 26, bit[6:5]

Reg 42, bit[6:5]

Vct 10M

Short

1 = Less than 10 meter short

Reg. 26, bit 7

Reg. 42, bit 7

11-9

Reserved

000

—

8-0

Vct_-

fault_count

Distance to the fault.

It’s approximately 0.4m*vct_fault_count[8:0]

{0, (0x00)}

{(Reg. 26, bit 0),

(Reg. 27, bit[7:0])}

{(Reg. 42, bit 0),

(Reg. 43, bit[7:0])}

PHY1 Register 31 (PHYAD = 0x1, REGAD = 0x1F): PHY Special Control/Status

PHY2 Register 31 (PHYAD = 0x2, REGAD = 0x1F): PHY Special Control/Status

15-6

Reserved

{(0x00),00} —

Polrvs

1 = Polarity is reversed

0 = Polarity is not reversed

Reg. 31, bit 5

Reg. 47, bit 5

MDI-X status

1 = MDI

0 = MDI-X

Reg. 30, bit 7

Reg. 46, bit 7

Force_lnk

R/W

1 = Force link pass

0 = Normal Operation

Reg. 26, bit 3

Reg. 42, bit 3

Pwrsave

R/W

0 = Enable power saving

1 = Disable power saving

Reg. 26, bit 2

Reg. 42, bit 2

Remote

Loopback

R/W

1 = Perform Remote loopback, as follows:

Port 1 (reg. 26, bit 1 = ‘1’)

Start: RXP1/RXM1 (port 1)

Loopback: PMD/PMA of port 1’s PHY

End: TXP1/TXM1 (port 1)

Port 2 (reg. 42, bit 1 = ‘1’)

Start: RXP2/RXM2 (port 2)

Loopback: PMD/PMA of port 2’s PHY

End: TXP2/TXM2 (port 2)

0 = Normal Operation

Reg. 26, bit 1

Reg. 42, bit 1

TABLE 4-2:

Bit

Name

R/W

Description

Default

Reference

KSZ8893FQL Datasheet(PDF) 49 Page - Microchip Technology

KSZ8893FQL Datasheet(HTML) 49 Page - Microchip Technology

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