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48SD1616 Datasheet(PDF) 2 Page - Maxwell Technologies |
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48SD1616 Datasheet(HTML) 2 Page - Maxwell Technologies |
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2 / 42 page  48SD1616 2 All data sheets are subject to change without notice ©2005 Maxwell Technologies All rights reserved. 256Mb (4-Meg X 16-Bit X 4-Banks) SDRAM 01.07.05 REV 4 Pinout Description Pin Descriptions Pin Name Function PKGGND Package Ground A0 to A12 Address Input BA0, BA1 Row Address A0 to A12 Column Address A0 to A8 Bank Select Address BA0/BA1 (BS) DQ0 to DQ15 Data-Input/Output CS\ Chip Select RAS\ Row Address Strobe CAS\ Column Address Strobe WE\ Write Enable DQMU/DQML Input/Output Mask CLK Clock Input CKE Clock Enable Vcc Power for internal circuits Vss Ground for internal circuits VccQ Power for DQ circuits VssQ Ground for DQ circuits NC No Connection |
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