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PIC16F913E/ML301 Datasheet(PDF) 27 Page - Microchip Technology |
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PIC16F913E/ML301 Datasheet(HTML) 27 Page - Microchip Technology |
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27 / 272 page ![]() © 2005 Microchip Technology Inc. Preliminary DS41250E-page 25 PIC16F917/916/914/913 2.2.2.5 PIE2 Register The PIE2 register contains the interrupt enable bits, as shown in Register 2-5. REGISTER 2-5: PIE2 – PERIPHERAL INTERRUPT ENABLE REGISTER 2 (ADDRESS: 8Dh) Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0 R/W-0 OSFIE C2IE C1IE LCDIE —LVDIE — CCP2IE bit 7 bit 0 bit 7 OSFIE: Oscillator Fail Interrupt Enable bit 1 = Enabled 0 =Disabled bit 6 C2IE: Comparator 2 Interrupt Enable bit 1 = Enables Comparator 2 interrupt 0 = Disables Comparator 2 interrupt bit 5 C1IE: Comparator 1 Interrupt Enable bit 1 = Enables Comparator 1 interrupt 0 = Disables Comparator 1 interrupt bit 4 LCDIE: LCD Module Interrupt Enable bit 1 = LCD interrupt is enabled 0 = LCD interrupt is disabled bit 3 Unimplemented: Read as ‘0’ bit 2 LVDIE: Low Voltage Detect Interrupt Enable bit 1 = Enables LVD Interrupt 0 = Disables LVD Interrupt bit 1 Unimplemented: Read as ‘0’ bit 0 CCP2IE: CCP2 Interrupt Enable bit (only available in 16F914/917) 1 = Enables the CCP2 interrupt 0 = Disables the CCP2 interrupt Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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