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STM32F722VCK7TR Datasheet(PDF) 109 Page - STMicroelectronics |
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STM32F722VCK7TR Datasheet(HTML) 109 Page - STMicroelectronics |
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109 / 229 page ![]() DS11853 Rev 6 109/229 STM32F722xx STM32F723xx Electrical characteristics 201 6.3.2 VCAP1/VCAP2 external capacitor Stabilization for the main regulator is achieved by connecting an external capacitor CEXT to the VCAP1/VCAP2 pins. CEXT is specified in Table 18. Note: The VCAP2 pin is not available on the LQFP64 package. Figure 31. External capacitor CEXT 1. Legend: ESR is the equivalent series resistance. VDD = 2.4 to 2.7 V Conversion time up to 2.4 Msps 24 MHz 216 MHz with 8 wait states and over-drive ON I/O compensation works 16-bit erase and program operations VDD = 2.7 to 3.6 V(4) Conversion time up to 2.4 Msps 30 MHz 216 MHz with 7 wait states and over-drive ON I/O compensation works 32-bit erase and program operations 1. Applicable only when the code is executed from Flash memory. When the code is executed from RAM, no wait state is required. 2. Thanks to the ART accelerator on ITCM interface and L1-cache on AXI interface, the number of wait states given here does not impact the execution speed from Flash memory since the ART accelerator or L1-cache allows to achieve a performance equivalent to 0-wait state program execution. 3. VDD/VDDA minimum value of 1.7 V is obtained with the use of an external power supply supervisor (refer to Section 3.15.2: Internal reset OFF). 4. The voltage range for USB full speed PHYs can drop down to 2.7 V. However the electrical characteristics of D- and D+ pins will be degraded between 2.7 and 3 V. Table 17. Limitations depending on the operating power supply range (continued) Operating power supply range ADC operation Maximum Flash memory access frequency with no wait states (fFlashmax) Maximum HCLK frequency vs Flash memory wait states (1)(2) I/O operation Possible Flash memory operations Table 18. VCAP1/VCAP2 operating conditions(1) 1. When bypassing the voltage regulator, the two 2.2 µF VCAP capacitors are not required and should be replaced by two 100 nF decoupling capacitors. Symbol Parameter Conditions CEXT Capacitance of external capacitor 2.2 µF ESR ESR of external capacitor < 2 Ω MS19044V2 ESR R Leak C |
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