AT91SAM9261 datasheet(3/688 Pages) ATMEL

3 / 688 page

6062F–ATARM–05-Dec-06

AT91SAM9261 Preliminary

Description

The AT91SAM9261 is a complete system-on-chip built around the ARM926EJ-S ARM

Thumb processor with an extended DSP instruction set and Jazelle Java accelerator. It

achieves 210 MIPS at 190 MHz.

The AT91SAM9261 is an optimized host processor for applications with an LCD display.

Its integrated LCD controller supports BW and up to 16M color, active and passive LCD

displays. The 160 Kbyte integrated SRAM can be configured as a frame buffer minimiz-

ing the impact for LCD refresh on the overall processor performance. The External Bus

Interface incorporates controllers for synchronous DRAM (SDRAM) and Static memo-

ries and features specific interface circuitry for CompactFlash and NAND Flash.

The AT91SAM9261 integrates a ROM-based Boot Loader supporting code shadowing

from, for example, external DataFlash® into external SDRAM. The software controlled

Power Management Controller (PMC) keeps system power consumption to a minimum

by selectively enabling/disabling the processor and various peripherals and adjustment

of the operating frequency.

The AT91SAM9261 also benefits from the integration of a wide range of debug features

including JTAG-ICE, a dedicated UART debug channel (DBGU) and an embedded real

time trace. This enables the development and debug of all applications, especially those

with real-time constraints.

AT91SAM9261 Datasheet(PDF) 3 Page - ATMEL Corporation