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AD9082 Datasheet(PDF) 3 Page - Analog Devices

Part # AD9082
Description  MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC
PDF  33 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9082 Datasheet(HTML) 3 Page - Analog Devices

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Data Sheet
AD9082
Rev. A | Page 3 of 33
FUNCTIONAL BLOCK DIAGRAM
DAC0
DAC1
RAMP
UP/DOWN
RAMP
UP/DOWN
DAC
BIAS
PA
PROTECT
PA
PROTECT
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
COARSE DIGITAL
UPCONVERSION
COARSE DIGITAL
UPCONVERSION
DAC2
DAC3
DAC
CLOCK
ADC0
RAMP
UP/DOWN
RAMP
UP/DOWN
LOOPBACK
MUX
FAST DETECT
SIGNAL MONITOR
÷1, ÷2, ÷3,
OR ÷4
ALIGN
DETECT
CLOCK DISTRIBUTION
AND
CONTROL LOGIC
SYNCRONIZATION
LOGIC
SPI
GPIO MUX
MICROPROCESSOR
FINE DIGITAL
UPCONVERSION
SERDIN0±
DAC0P
DAC0N
DAC1P
DAC1N
ISET
DAC2P
DAC2N
DAC3P
DAC3N
ADC0P
ADC0N
ADC1P
ADC1N
ADCx_FD1
ADCx_SMON0
ADCx_SMON1
ADCx_FD2
VCM0
SERDIN7±
SYNCOUTB0±
SYNCOUTB1±
SYNCINB0±
SYNCINB1±
RXEN0
RXEN1
TXEN0
TXEN1
SERDIN6±
SERDIN5±
SERDIN4±
SERDIN3±
SERDIN2±
SERDIN1±
SERDOUT0±
SERDOUT7±
SERDOUT6±
SERDOUT5±
SERDOUT4±
SERDOUT3±
SERDOUT2±
SERDOUT1±
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
FINE DIGITAL
UPCONVERSION
PA
PROTECT
PA
PROTECT
COARSE DIGITAL
UPCONVERSION
COARSE DIGITAL
UPCONVERSION
COARSE DIGITAL
DOWNCONVERSION
COARSE DIGITAL
DOWNCONVERSION
COARSE DIGITAL
DOWNCONVERSION
COARSE DIGITAL
DOWNCONVERSION
PEAK VALUE
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
DELAY
ADJUST
PLL
CLOCK
RECEIVER
CLOCK
DRIVER
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
FINE DIGITAL
DOWNCONVERSION
VCM1
VDD1_NVG
BVDD3
BVNN2
BVNN1
VNN1
NVG1_OUT
SYSREF
CLOCK
RECEIVER
ADC1
TO DAC
CLOCK
AD9082
Figure 1.



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