LT3752MPFE#PBF datasheet(8/52 Pages) AD

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LT3752/LT3752-1

Rev. C

For more information www.analog.com

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LT3752EFE/LT3752EFE-1 are guaranteed to meet performance

specifications from 0°C to 125°C junction temperature. Specifications

over the –40°C to 125°C operating junction temperature range are

assured by design, characterization and correlation with statistical process

controls. The LT3752IFE/LT3752IFE-1 are guaranteed to meet performance

specifications from –40°C to 125°C junction temperature. The LT3752HFE/

LT3752HFE-1 are guaranteed to meet performance specifications from

–40°C to 150°C junction temperature. The LT3752MPFE/LT3752MPFE-1

are tested and guaranteed to meet performance specifications from –55°C

to 150°C junction temperature.

Note 3: For maximum operating ambient temperature, see the Thermal

Calculations section in the Applications Information section.

Note 4: SYNC minimum and maximum thresholds are guaranteed by

SYNC frequency range test using a clock input with guard banded SYNC

levels of 0.7V low level and 1.7V high level.

Note 5: Rise and fall times are measured between 10% and 90% of gate

driver supply voltage.

Note 6: Guaranteed by correlation to static test.

Note 7: VIN start-up current is measured at VIN = VIN(ON) – 0.25V and then

scaled by 1.18× to correlate to worst-case VIN current required for part

start-up at VIN = VIN(ON).

Note 8: Guaranteed by design.

Note 9: ON times are measured between rising and falling edges at 50% of

gate driver supply voltage.

Note 10: Current flows out of pin.

Note 11: Guaranteed by correlation to RTAS = 73.2k test.

Note 12: tOA timing guaranteed by design based on correlation to

measured tAO timing.

Note 13: Guaranteed by correlation to RTAO = 44.2k test.

Note 14: Guaranteed by correlation to RTOS = 14.7k test.

Note 15: A 2µs one-shot of 20µA from the UVLO_VSEC pin allows

communication between ICs to begin shutdown (useful when stacking

supplies for more power ( = inputs in parallel/outputs in series)). The

current is tested in a static test mode. The 2µs one-shot is guaranteed by

design.

Note 16: Guaranteed by correlation to RTBLNK = 14.7k test.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

HOUT Driver (Housekeeping Controller)

HOUT Rise Time

CL = 1nF (Note 5), INTVCC = 12V

HOUT Fall Time

CL = 1nF (Note 5), INTVCC = 12V

HOUT Low Level

0.1

HOUT High Level

LT3752

LT3752-1

INTVCC = 12V

11.9

HOUT Low Level in Shutdown

UVLO_VSEC = 0V, INTVCC = 12V, IHOUT = 1mA

Into the Pin

0.25

HOUT Maximum Duty Cycle

HCOMP = 2.7V, RT = 24.9k

HOUT Minimum ON Time

CL = 1nF (Note 9), INTVCC = 12V

350

Soft-Start (HSS) (Housekeeping Controller)

HSS (Internal) Ramp Time (tHSS)

HCOMP SW ≥ HCOMP VOH – 0.1V

2.2

Oscillator (Housekeeping Controller)

Frequency (fHOUT) (fOSC Folded Back) (LT3752)

HFB = 0.8V, RT = 24.9k, SS1 = 0V

kHz

Frequency (fHOUT) (fOSC Folded Back) (LT3752-1)

HFB = 0.8V, RT = 24.9k, SS1 = 0V

119

141

163

kHz

Frequency (fHOUT) (Full-Scale fOSC)

HFB = 1.15V, HCOMP = 2.7V

279

300

321

kHz

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, UVLO_VSEC = 2.5V.

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