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LT8614 Datasheet(PDF) 16 Page - Analog Devices

Part # LT8614
Description  Dual 5V, 2A Synchronous Step-Down DC/DCs in 2mm 횞 2mm LQFN
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT8614 Datasheet(HTML) 16 Page - Analog Devices

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LTC3315A
16
Rev. A
For more information www.analog.com
APPLICATIONS INFORMATION
Transient performance and control loop stability can
be improved with a higher COUT and/or the addition of
a feedforward capacitor, CFF, placed between VOUT and
FB. Capacitor CFF provides phase lead compensation by
creating a high frequency zero which improves the phase
margin and the high-frequency response. The values used
in the typical application circuits are a good starting point.
LTpowerCAD® is a useful tool to help optimize CFF and
COUT for the desired transient performance.
Applying a load transient and monitoring the response of
the system or using a network analyzer to measure the
actual loop response are two ways to experimentally verify
transient performance and control loop stability, and to
optimize CFF and COUT.
Whenusingtheloadtransientresponsemethodtostabilize
the control loop, apply an output current pulse going from
20% to 100% of full load current having a very fast rise
time. This will produce a transient on the output voltage.
Monitor VOUT for overshoot or ringing that might indicate
a stability problem (see Application Note 149).
Using the Precision Enable Threshold
The LTC3315A has precision threshold enable pins for
each buck regulator to enable or disable each buck. When
both are forced low, the device enters into a low current
shutdown mode.
The rising threshold of both EN comparators is 400mV,
with 50mV of hysteresis. The EN pins can be tied to VIN
if the shutdown feature is not used. Adding a resistor
divider from VIN to an EN pin to ground programs the
LTC3315A to regulate that output only when VIN is above
a desired voltage.
Typically, this threshold, VIN(EN), is used in situations
where the input supply is current limited, or has a rela-
tively high source resistance. A switching regulator draws
near constant power from its input source, so source cur-
rent increases as source voltage drops. This looks like
a negative resistance load to the source and can cause
the source to current limit or latch low under low source
voltage conditions. The VIN(EN) threshold prevents the
regulator from operating at source voltages where prob-
lems may occur. Referring to Figure 2, this threshold can
Figure 2. EN Divider
R4
VIN
EN
3315ab F02
BUCK
SWITCHING
REGULATOR
R3
be adjusted by setting the values of R3 and R4 such that
they satisfy the following equation:
VIN(EN) = 400mV • 1+
R4
R3
⎛
⎝
⎜
⎞
⎠
⎟
(9)
The buck regulator will remain off until VIN is above
VIN(EN). The buck regulator will remain enabled until VIN
falls to 0.875 • VIN(EN) and EN is 350mV.
Alternatively a resistor divider from the output of one buck
to the EN pin of the second buck to ground provides event
based power-up sequencing as the first buck reaching
regulation enables the second buck. Replace VIN(EN) in
Equation 9 with the desired output voltage of the first buck
(e.g. 90% of the regulated value) at which the second
buck is enabled.
PCB Considerations
The LTC3315A is a high performance IC designed for high
efficiency and fast transient response. For optimal results
carefully consider the layout of the PCB board and follow
the below list to ensure proper operation. See Figure 3 for
a recommended PCB layout.
1. Connect the exposed pad of the package (Pin 13)
directly to a large, unbroken ground plane under the
application circuit on the layer closest to the sur-
face layer to minimize thermal and electrical imped-
ance. Additionally, short the exposed pad to ground
pins 8 and 9 on the top layer. See the Analog Devices
Application Note, Application Notes for Thermally
Enhanced Leaded Plastic Packages for the proper size
and layout of the thermal vias and solder stencils.
2. Both of the input supply pins should have local decou-
pling capacitors with their grounded pins connecting
on the top layer to the ground plane around pin 8,



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