TL082CPWR datasheet(13/66 Pages) TI

13 / 66 page

For VS = (VCC+) – (VCC–) = 4.5 V to 40 V (±2.25 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and

VO UT = VS / 2, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Settling time

To 0.1%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20

0.63

μs

To 0.1%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20

0.56

To 0.01%, VS = 40 V, VSTEP = 10 V , G = +1, CL =

20 pF

0.91

To 0.01%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20

0.48

Phase margin

G = +1, RL = 10kΩ, CL = 20 pF

Overload recovery time VIN × gain > VS

300

THD+N

Total harmonic

distortion + noise

VS = 40 V, VO = 6 VRMS, G = +1, f = 1 kHz

0.00012

EMIRR

EMI rejection ratio

f = 1 GHz

OUTPUT

Voltage output swing

from rail

Positive rail headroom

VS = 40 V, RL = 10 kΩ

115

210

VS = 40 V, RL = 2 kΩ

520

965

Negative rail headroom

VS = 40 V, RL = 10 kΩ

105

215

VS = 40 V, RL = 2 kΩ

500

1030

ISC

Short-circuit current

±26

CLOAD

Capacitive load drive

300

Open-loop output

impedance

f = 1 MHz, IO = 0 A

125

Ω

POWER SUPPLY

Quiescent current per

amplifier

IO = 0 A

937.5

1125

µA

TA = –40°C to 125°C

1130

Turn-On Time

At TA = 25°C, VS = 40 V, VS ramp rate > 0.3 V/µs

μs

(1)

Max IB and Ios data is specified based on characterization results.

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SLOS081J – FEBRUARY 1977 – REVISED NOVEMBER 2020

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