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STM32L4R9ZGT6STR Datasheet(PDF) 43 Page - STMicroelectronics

Part # STM32L4R9ZGT6STR
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150DMIPS, up to 2MB Flash, 640KB SRAM, LCD-TFT & MIPI DSI, ext. SMPS
PDF  307 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4R9ZGT6STR Datasheet(HTML) 43 Page - STMicroelectronics

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DS12023 Rev 5
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STM32L4R5xx, STM32L4R7xx and STM32L4R9xx
Functional overview
65
3.15
DMA request router (DMAMux)
When a peripheral indicates a request for DMA transfer by setting its DMA request line, the
DMA request is pending until it is served and the corresponding DMA request line is reset.
The DMA request router allows to route the DMA control lines between the peripherals and
the DMA controllers of the product.
An embedded multi-channel DMA request generator can be considered as one of such
peripherals. The routing function is ensured by a multi-channel DMA request line
multiplexer. Each channel selects a unique set of DMA control lines, unconditionally or
synchronously with events on synchronization inputs.
For simplicity, the functional description is limited to DMA request lines. The other DMA
control lines are not shown in figures or described in the text. The DMA request generator
produces DMA requests following events on DMA request trigger inputs.
3.16
Chrom-ART Accelerator (DMA2D)
Chrom-ART Accelerator (DMA2D) is a graphic accelerator that offers an advanced bit
blitting, row data copy and pixel format conversion. It supports the following functions:
•
Rectangle filling with a fixed color
•
Rectangle copy
•
Rectangle copy with pixel format conversion
•
Rectangle composition with blending and pixel format conversion.
Various image format coding are supported, from indirect 4 bpp color mode up to 32 bpp
direct color. It embeds a dedicated memory to store color lookup tables.
An interrupt can be generated when an operation is complete or at a programmed
watermark.
All the operations are fully automatized and are running independently from the CPU or the
DMAs.
3.17
Chrom-GRC (GFXMMU)
The Chrom-GRC (GFXMMU) is a graphical oriented memory management unit aimed to:
•
Optimize memory usage according to the display shape
•
Manage packing/unpacking for 24 bpp frame buffers
The Chrom-GRC features:
•
Fully programmable display shape to physically store only the visible pixel
•
Up to four virtual buffers
•
Each virtual buffer have 4096 bytes per line and 1024 lines
•
Each virtual buffer can be physically mapped to any system memory
•
24 bpp packing unit to store unpacked 24bpp data in a packed 24 bpp
•
Packing/un-packing management per buffer
•
Interrupt in case of buffer overflow (1 per buffer)
•
Interrupt in case of memory transfer error



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