LTC4444 datasheet(11/18 Pages) AD

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LTC7060

Rev. A

For more information www.analog.com

BOOTSTRAPPED SUPPLY (BGVCC-BGRTN, BST-SW)

Either or both of the BGVCC-BGRTN and BST-SW sup-

plies can be bootstrapped supplies. An external boost

capacitor, CB, connected between BGVCC and BGRTN, or

between BST and SW, supplies the gate driver voltage for

its respective MOSFET driver. When the external MOSFET

is turned on, the driver places the CB voltage across the

gate-source of the MOSFET. This enhances the MOSFET

and turns it on.

The charge to turn on the external MOSFET is referred to

gate charge, QG, and is typically specified in the external

MOSFET data sheet. The boost capacitor, CB, needs to

have at least 10 times the gate capacitance to turn on the

external MOSFET fully. Gate charge can range from 5nC

to hundreds of nC and is influenced by the gate drive level

and type of external MOSFET used. For most applica-

tions, a capacitor value of 0.1uF for CB will be sufficient.

However, if multiple MOSFETs are paralleled and driven

by the LTC7060, CB capacitance needs to be increased

correspondingly.

An external supply, typically VCC connected through a

Schottky diode, is required to keep the CB charged. The

LTC7060 does not charge the CB and always discharges

the CB. When the BG/TG is high, the total current from

BGVCC/BST to BGRTN/SW and SGND is typically 100µA;

when the BG/TG is low, the total current from BGVCC/BST

is typically 8µA.

POWER DISSIPATION

To ensure proper operation and long-term reliability, the

LTC7060 must not operate beyond its maximum tem-

perature rating. Package junction temperature can be

calculated by:

TJ = TA + (PD)(θJA)

where:

TJ = junction temperature

TA = ambient temperature

PD = power dissipation

θJA = junction-to-ambient thermal resistance

APPLICATIONS INFORMATION

Power dissipation consists of standby, switching and

capacitive load power losses:

PD = PDC + PAC + PQG

where:

PDC = quiescent power loss

PAC = internal switching loss at input frequency fIN

PQG = loss due to turning on and off external MOSEFT

with gate charge QG at frequency fIN

The LTC7060 consumes very little quiescent current. The

DC power loss at VCC = 10V is only (10V)(0.4mA) = 4mW.

At a particular switching frequency, the internal power

loss increases due to both AC currents required to charge

and discharge internal nodal capacitances and cross-con-

duction currents in the internal logic gates. The sum of the

quiescent current and internal switching current with no

load are shown in the Typical Performance Characteristics

plot of Switching Supply Current vs Input Frequency.

The gate charge losses are primarily due to the large AC

currents required to charge and discharge the capacitance

of the external MOSFETs during switching. For identical

pure capacitive loads CLOAD on BG and TG at switching

frequency fIN, the load losses would be:

PCLOAD = (CLOAD)(fIN)[(VBST-SW)2 + (VBGVCC-BGRTN)2]

In a typical synchronous buck configuration, the VCC is

connected to the power for the bottom MOSFET driver,

BGVCC. VBST-SW is equal to VCC -VD, where VD is the for-

ward voltage drop of the external Schottky diode between

VCC and BST. If this drop is small relative to VCC, the load

losses can be approximated as:

PCLOAD ≈ 2(CLOAD)(fIN)(VCC)2

Unlike a pure capacitive load, a power MOSFET’s gate

capacitance seen by the driver output varies with its VGS

voltage level during switching. A MOSFET’s capacitive

load power dissipation can be calculated using its gate

charge, QG. The QG value corresponding to the MOSFET’s

VGS value (VCC in this case) can be readily obtained

from the manufacturer’s QG vs VGS curves. For identical

MOSFETs on BG and TG:

PQG ≈ 2(QG)(fIN)(VCC)

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