MSP3450G datasheet(2/106 Pages) MICRONAS

2 / 106 page

May 27, 2003; 6251-476-1DS

Micronas

Contents

Page

Section

Title

MSP 34x0G

DATA SHEET

Introduction

1.1.

Features of the MSP 34x0G Family

1.2.

MSP 34x0G Version List

1.3.

MSP 34x0G Versions and their Application Fields

Functional Description

2.1.

Architecture of the MSP 34x0G Family

2.2.

Sound IF Processing

2.2.1.

Analog Sound IF Input

2.2.2.

Demodulator: Standards and Features

2.2.3.

Preprocessing of Demodulator Signals

2.2.4.

Automatic Sound Select

2.2.5.

Manual Mode

2.3.

Preprocessing for SCART and I2S Input Signals

2.4.

Source Selection and Output Channel Matrix

2.5.

Audio Baseband Processing

2.5.1.

SRS WOW

2.5.2.

BBE High Definition Sound

2.5.3.

Micronas VOICE

2.5.4.

Automatic Volume Correction (AVC)

2.5.5.

Loudspeaker and Headphone Outputs

2.5.6.

Subwoofer Output

2.5.7.

Quasi-Peak Detector

2.5.8.

Micronas BASS (MB)

2.5.8.1.

Dynamic Amplification

2.5.8.2.

Adding Harmonics

2.5.8.3.

Micronas BASS Parameters

2.6.

SCART Signal Routing

2.6.1.

SCART DSP In and SCART Out Select

2.6.2.

Stand-by Mode

2.7.

I2S Bus Interface

2.8.

ADR Bus Interface

2.9.

Digital Control I/O Pins and Status Change Indication

2.10.

Clock PLL Oscillator and Crystal Specifications

Control Interface

3.1.

I2C Bus Interface

3.1.1.

Internal Hardware Error Handling

3.1.2.

Description of CONTROL Register

3.1.3.

Protocol Description

3.1.4.

Proposals for General MSP 34x0G I2C Telegrams

3.1.4.1.

Symbols

3.1.4.2.

Write Telegrams

3.1.4.3.

Read Telegrams

3.1.4.4.

Examples

3.2.

Start-Up Sequence: Power-Up and I2C-Controlling

3.3.

MSP 34x0G Programming Interface

MSP3450G Datasheet(PDF) 2 Page - Micronas

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