LM27262 datasheet(9/22 Pages) NSC

9 / 22 page

Electrical Characteristics (Note 5),(Note 6) V

CC5V = 5V unless otherwise specified. (Continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VRON De-assertion

Delay

Delay of VRON falling edge by the internal logic

nsec

REFINT

REFINT Leakage

Current

REFINT = 3.3V or GND

±2

µA

Logic Low Input

Voltage

0.5

Logic High Input

Voltage

3.0

PHASES

PHASES Leakage

Current

PHASES =0V

- 25

µA

PHASES = 3.3V

µA

PHASES Open Circuit

Voltage

10M

Ω to Ground

2.8

Logic Low Max Input

Voltage

0.2

Logic High Min Input

Voltage

Relative to Vcc (5V nominal)

-0.2

LOGIC OUTPUTS: DRIVEx

Output High Voltage

Output Source Current is 10 mA

3.5

Output Source Current is 0 mA (no load)

4.5

Output Low Voltage

Output Sink Current is 10 mA

0.3

Low-to-High Transition

Time

10% to 90% of V

CC5V,

LOAD = 50pF

High-to-Low Transition

Time

90% to 10% of V

CC5V,

LOAD = 50pF

VIDPGD

VIDPGD Output Max

Low Voltage

VIDPGD sinking 4mA (open drain)

0.17

0.25

VIDPGD Leakage

Current

VIDPGD = 5.5V

µA

VIDPGD Assertion

Delay

VRON assertion to VIDPGD assertion

(SOFTCAP = 0.01µF)

VIDPGD De-assertion

Delay

VRON de-assertion to VIDPGD de-assertion

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the

device is guaranteed. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics table.

Note 2: The maximum allowable power dissipation is calculated by using PDmax =(TJMAX -TA)/θJA , where TJMAX is the maximum junction temperature, TA is the

ambient temperature, and

θJA is the junction-to-ambient thermal resistance of the specified package. The 1.56W rating results from using 150˚C, 25˚C, and 80˚C/W

for TJMAX,TA, and θJA respectively. The θJA of 90˚C/W represents the worst-case condition with no heat sinking of the 48-Pin TSSOP. Heat sinking allows the safe

dissipation of more power. The Absolute Maximum power dissipation should be de-rated by 12.5mW per ˚C above 25˚C ambient. The LM27262 actively limits its

junction temperature to about 165˚C.

Note 3: For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook available from National Semiconductor Corporation.

Note 4: For testing purposes, ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5k

Ω resistor.

Note 5: All limits are guaranteed at room temperature (standard face type) and at temperature extremes (bold face type). All room temperature limits are 100%

production tested. All limits at temperature extremes are guaranteed via correlation using Statistical Quality Control (SQC) methods. All limits are used to calculate

Average Outgoing Quality Level (AOQL).

Note 6: A “typical” specification is the center of characterization data distribution taken with TA =TJ = 25˚C. Typical data are not guaranteed.

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