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LTM4680 Datasheet(PDF) 39 Page - Analog Devices

Part # LTM4680
Description  Quad 31.25A or Single 125A 關Module Regulator with Digital Power System Management
PDF  132 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4680 Datasheet(HTML) 39 Page - Analog Devices

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LTM4681
39
Rev. 0
For more information www.analog.com
microcontroller to poll the fault commands. Alternatively,
the FAULTn pins can be used as inputs to detect external
faults downstream of the controller that require an imme-
diate response.
Any fault or warning event will always cause the ALERT_nn
pin to assert low unless the fault or warning is masked by
the SMBALERT_MASK. The pin will remain asserted low
until the CLEAR_FAULTS command is issued, the fault bit
is written to a 1 or bias power is cycled or a MFR_RESET
command is issued, or the RUNn pins are toggled OFF/
ON or the part is commanded OFF/ON via PMBus or an
ARA command operation is performed. The MFR_FAULT_
PROPAGATE command determines if the FAULTn pins are
pulled low when a fault is detected.
Output and input fault event handling is controlled by the
corresponding fault response byte as specified in Table 14
thru Table 18. Shutdown recovery from these types of
faults can either be autonomous or latched. For autono-
mous recovery, the faults are not latched, so if the fault
conditions not present after the retry interval has elapsed,
a new soft-start is attempted.
If the fault persists, the controller will continue to retry.
The retry interval is specified by the MFR_RETRY_DELAY
command and prevents damage to the regulator com-
ponents by repetitive power cycling, assuming the fault
condition itself is not immediately destructive. The MFR_
RETRY_DELAY must be greater than 120ms. It can not
exceed 83.88 seconds.
Status Registers and ALERT Masking
Figure 5 summarizes the internal LTM4681 status regis-
ters accessible by PMBus command. These contain indi-
cation of various faults, warnings and other important
operating conditions. As shown, the STATUS_BYTE and
STATUS_WORD commands also summarize contents of
other status registers. Refer to PMBus Command Details
for specific information.
NONE OF THE ABOVE in the STATUS_BYTE indicates that
one or more of the bits in the most-significant nibble of
STATUS_WORD are also set.
OPERATION
In general, any asserted bit in a STATUS_x register also
pulls the ALERT_nn pin low. Once set, ALERT_nn will
remain low until one of the following occurs.
n
A CLEAR_FAULTS or MFR_RESET Command Is
Issued
n
The Related Status Bit Is Written to a One
n
The Faulted Channel Is Properly Commanded Off and
Back On
n
The LTM4681 Successfully Transmits Its Address
During a PMBus ARA
n
Bias Power Is Cycled
With some exceptions, the SMBALERT_MASK command
can be used to prevent the LTM4681 from asserting
ALERT_nn for bits in these registers on a bit-by-bit basis.
These mask settings are promoted to STATUS_WORD
and STATUS_BYTE in the same fashion as the status bits
themselves. For example, if ALERT_nn is masked for all
bits in channel n STATUS_VOUT, then ALERT_nn is effec-
tively masked for the VOUT bit in STATUS_WORD for PAGE
n. The BUSY bit in STATUS_BYTE also asserts ALERT_nn
low and cannot be masked. This bit can be set as a result
of various internal interactions with PMBus communi-
cation. This fault occurs when a command is received
that cannot be safely executed with one or both channels
enabled. As discussed in the Application Information,
BUSY faults can be avoided by polling MFR_COMMON
before executing some commands.
If masked faults occur immediately after power up,
ALERT_nn may still be pulled low because there has not
been time to retrieve all of the programmed masking
information from EEPROM.
Status information contained in MFR_COMMON and
MFR_PADS can be used to further debug or clarify the
contents of STATUS_BYTE or STATUS_WORD as shown,
but the contents of these registers do not affect the state
of the ALERT_nn pin and may not directly influence bits
in STATUS_BYTE or STATUS_WORD.



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