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ADGS1208BCPZ Datasheet(PDF) 29 Page - Analog Devices |
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ADGS1208BCPZ Datasheet(HTML) 29 Page - Analog Devices |
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29 / 33 page ![]() Data Sheet ADGS1208/ADGS1209 Rev. 0 | Page 29 of 33 REGISTER DETAILS SWITCH DATA REGISTER Address: 0x01, Reset: 0x00, Name: SW_DATA The switch data register controls the status of the eight switches of the ADGS1208/ADGS1209 as well as the general-purpose digital outputs. Use the ADGS1208/ADGS1209 truth tables in conjunction with the bit descriptions. Table 13. Bit Descriptions for SW_DATA in the ADGS1208 Bits Bit Name Settings Description Default Access 7 GPO4 Enable bit for GPO4. 0x0 R/W 6 GPO3 Enable bit for GPO3. 0x0 R/W 5 GPO2 Enable bit for GPO2. 0x0 R/W 4 GPO1 Enable bit for GPO1. 0x0 R/W 3 A2 Enable bit for A2. 0x0 R/W 2 A1 Enable bit for A1. 0x0 R/W 1 A0 Enable bit for A0. 0x0 R/W 0 EN Enable bit for the ADGS1208. 0x0 R/W 0 ADGS1208 disabled. 1 ADGS1208 enabled. Table 14. Bit Descriptions for SW_DATA ADGS1209 Bits Bit Name Settings Description Default Access 7 GPO4 Enable bit for GPO4. 0x0 R/W 6 GPO3 Enable bit for GPO3. 0x0 R/W 5 GPO2 Enable bit for GPO2. 0x0 R/W 4 GPO1 Enable bit for GPO1. 0x0 R/W 3 Reserved This bit is reserved. Set this bit to 0. 0x0 R 2 A1 Enable bit for A1. 0x0 R/W 1 A0 Enable bit for A0. 0x0 R/W 0 EN Enable bit for ADGS1209. 0x0 R/W 0 ADGS1209 disabled. 1 ADGS1209 enabled. Table 15. ADGS1208 Truth Table A2 A1 A0 EN On Switch X X X 0 None 0 0 0 1 S1 0 0 1 1 S2 0 1 0 1 S3 0 1 1 1 S4 1 0 0 1 S5 1 0 1 1 S6 1 1 0 1 S7 1 1 1 1 S8 |
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