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TSB712 Datasheet(PDF) 14 Page - STMicroelectronics |
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TSB712 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 36 page ![]() Figure 26. Phase margin vs. output current at VCC = 36 V Figure 27. Phase margin vs. capacitive load Figure 28. Overshoot vs. capacitive load at VCC = 36 V Figure 29. Small step response vs. time at VCC = 5 V Figure 30. Desaturation time at low rail at VCC = 5 V Figure 31. Desaturation time at high rail at VCC = 5 V TSB711, TSB711A, TSB712, TSB712A, TSB714, TSB714A Typical performance characteristics DS12487 - Rev 6 page 14/36 |
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