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TMS320F28375DPZP Datasheet(PDF) 1 Page - Texas Instruments |
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TMS320F28375DPZP Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 226 page  TMS320F2837xD Dual-Core Microcontrollers 1 Features • Dual-core architecture – Two TMS320C28x 32-bit CPUs – 200 MHz – IEEE 754 single-precision Floating-Point Unit (FPU) – Trigonometric Math Unit (TMU) – Viterbi/Complex Math Unit (VCU-II) • Two programmable Control Law Accelerators (CLAs) – 200 MHz – IEEE 754 single-precision floating-point instructions – Executes code independently of main CPU • On-chip memory – 512KB (256KW) or 1MB (512KW) of flash (ECC-protected) – 172KB (86KW) or 204KB (102KW) of RAM (ECC-protected or parity-protected) – Dual-zone security supporting third-party development – Unique identification number • Clock and system control – Two internal zero-pin 10-MHz oscillators – On-chip crystal oscillator – Windowed watchdog timer module – Missing clock detection circuitry • 1.2-V core, 3.3-V I/O design • System peripherals – Two External Memory Interfaces (EMIFs) with ASRAM and SDRAM support – Dual 6-channel Direct Memory Access (DMA) controllers – Up to 169 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pins with input filtering – Expanded Peripheral Interrupt controller (ePIE) – Multiple Low-Power Mode (LPM) support with external wakeup • Communications peripherals – USB 2.0 (MAC + PHY) – Support for 12-pin 3.3 V-compatible Universal Parallel Port (uPP) interface – Two Controller Area Network (CAN) modules (pin-bootable) – Three high-speed (up to 50-MHz) SPI ports (pin-bootable) – Two Multichannel Buffered Serial Ports (McBSPs) – Four Serial Communications Interfaces (SCI/ UART) (pin-bootable) – Two I2C interfaces (pin-bootable) • Analog subsystem – Up to four Analog-to-Digital Converters (ADCs) • 16-bit mode – 1.1 MSPS each (up to 4.4-MSPS system throughput) – Differential inputs – Up to 12 external channels • 12-bit mode – 3.5 MSPS each (up to 14-MSPS system throughput) – Single-ended inputs – Up to 24 external channels • Single Sample-and-Hold (S/H) on each ADC • Hardware-integrated post-processing of ADC conversions – Saturating offset calibration – Error from setpoint calculation – High, low, and zero-crossing compare, with interrupt capability – Trigger-to-sample delay capture – Eight windowed comparators with 12-bit Digital- to-Analog Converter (DAC) references – Three 12-bit buffered DAC outputs • Enhanced control peripherals – 24 Pulse Width Modulator (PWM) channels with enhanced features – 16 High-Resolution Pulse Width Modulator (HRPWM) channels • High resolution on both A and B channels of 8 PWM modules • Dead-band support (on both standard and high resolution) – Six Enhanced Capture (eCAP) modules – Three Enhanced Quadrature Encoder Pulse (eQEP) modules – Eight Sigma-Delta Filter Module (SDFM) input channels, 2 parallel filters per channel • Standard SDFM data filtering www.ti.com TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 1 Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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