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PIMXRT516SCVP2A Datasheet(PDF) 1 Page - NXP Semiconductors |
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PIMXRT516SCVP2A Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 124 page ![]() NXP Semiconductors Data Sheet: Technical Data Document Number:IMXRT1160CEC Rev. 0, 04/2021 MIMXRT1166DVM6A MIMXRT1165DVM6A Package Information Plastic Package 289-pin MAPBGA, 14 x 14 mm, 0.8 mm pitch Ordering Information See Table 1 on page 6 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. © 2021 NXP B.V. 1 i.MX RT1160 introduction The i.MX RT1160 is a new high-end processor of i.MX RT family, which features NXP’s advanced implementation of a high performance Arm Cortex®-M7 core operating at speeds up to 600 MHz and a power efficient Cortex®-M4 core up to 240 MHz. The i.MX RT1160 processor has 1 MB on-chip RAM in total, including a 768 KB RAM which can be flexibly configured as TCM (512 KB RAM shared with M7 TCM and 256 KB RAM shared with M4 TCM) or general-purpose on-chip RAM. The i.MX RT1160 integrates advanced power management module with DCDC and LDO regulators that reduce complexity of external power supply and simplifies power sequencing. The i.MX RT1160 also provides various memory interfaces, including SDRAM, RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad/Octal SPI, Hyper RAM/Flash, and a wide range of other interfaces for connecting peripherals, such as WLAN, Bluetooth™, GPS, displays, and camera sensors. The i.MX RT1160 i.MX RT1160 Crossover Processors Data Sheet for Consumer Products 1. i.MX RT1160 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6 1.3. Package marking information . . . . . . . . . . . . . . . . 9 2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1. Special signal considerations . . . . . . . . . . . . . . . 20 3.2. Recommended connections for unused analog interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 23 4.2. System power and clocks . . . . . . . . . . . . . . . . . . 32 4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 50 4.5. External memory interface . . . . . . . . . . . . . . . . . 54 4.6. Display and graphics . . . . . . . . . . . . . . . . . . . . . . 64 4.7. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 4.8. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 4.9. Communication interfaces . . . . . . . . . . . . . . . . . . 81 4.10. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 5. Boot mode configuration . . . . . . . . . . . . . . . . . . . 99 5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 99 5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 99 5.2. Boot device interface allocation . . . . . . . . . . . . . . 99 6. Package information and contact assignments . . . . . . 105 6.1. 14 x 14 mm package information . . . . . . . . . . . 105 7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 |
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