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AS7C33128PFD32A Datasheet(PDF) 7 Page - Alliance Semiconductor Corporation

Part # AS7C33128PFD32A
Description  3.3V 128K X 32/36 pipeline burst synchronous SRAM
PDF  11 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS7C33128PFD32A Datasheet(HTML) 7 Page - Alliance Semiconductor Corporation

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AS7C33128PFD32A
AS7C33128PFD36A
®
3/22/01; v.1.0
Alliance Semiconductor
P. 7 of 11
Timing waveform of read cycle
Note: Ý = XOR when MODE = HIGH/No Connect; Ý = ADD when MODE = LOW.
BW[a:d] is don’t care.
tCYC
tCH
tCL
tADSPS
tADSPH
tAS
tAH
tWS
tADVS
tOH
CLK
ADSP
ADSC
Address
GWE, BWE
CE0, CE2
ADV
OE
DOUT
tCSS
tCSH
tCD
tWH
tADVH
tHZOE
tADSCS
tADSCH
LOAD NEW ADDRESS
ADV INSERTS WAIT STATES
Q(A2Ý10)
Q(A2Ý11)
Q(A3)
Q(A2)
Q(A2Ý01)
Q(A3Ý01)
Q(A3Ý10)
Q(A1)
A2
A1
A3
CE1
(pipelined mode)
DOUT
Q(A2Ý10)
Q(A2Ý11)
Q(A3)
Q(A2Ý01)
Q(A3Ý01)
Q(A3Ý10)
Q(A3Ý11)
Q(A1)
(flow-through mode)
tHZC
tOE
tLZOE
Q(A3Ý11)
tHZC
Key to switching waveform
Undefined/don’t care
Falling input
Rising input



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