11 Layout

11.1 Layout Guidelines

• This device is specified for current handling of up to 50 A over the entire –40°C to +85°C temperature range

using a 2-oz. copper pour for the input power plane, as well as no external airflow passing over the device.

• The primary current-handling limitation for this device is how much heat is dissipated inside the package.

Efforts to improve heat transfer out of the package and into the surrounding environment improve the ability

of the device to handle currents of up to 50 A over a wider temperature range.

• Heat transfer improvements primarily involve larger copper power traces and planes with increased copper

thickness (2 oz.), as well as providing airflow to pass over the device. Thermal vias help spread the current

and power dissapated over multiple board layers. The INA254 evaluation module (EVM) features a 2-oz.

copper pour for the planes, and is capable of supporting 50 A at temperatures up to 125°C.

• The bypass capacitor should be placed close to device ground and supply pins, but can be moved farther

out if needed to avoid cutting thermal planes. The recommended value of this bypass capacitor is 0.1 µF.

Additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies.

11.2 Layout Example

DNC

RES

OUT

REF1

IS-

SH+

IN+

IS+

DNC

IS-

NC

IS+

DNC

GND

VS

REF2

IS-

SH-

IN-

IS+

DNC

IS-

NC

IS+

25

26

16

15

14

13

19

18

17

22

21

20

24

23

INA254

Thermal Vias connecting top,

bottom and mid layers maximize

thermal performance

Pour IS+ Plane on

Top, Bottom, and Mid

Layers to maximize

thermal performance

IS- Plane on Top,

Bottom, and Mid

Layers to maximize

thermal performance

9

10

11

12

6

7

8

3

4

5

1

2

OUT, REF, VS pins VIA to mid

layer to avoid breaking thermal

planes on top and bottom layers

VIA RES and GND to internal GND

Plane on mid layers or via and

route to mid layer GND connection

Current Sense Amplifer Output

Current should flow

directly through the

internal shunt following

package orientation

Connect to GND or VS

depending on operational mode

Connect to GND or VS

depending on operational mode

VIA to GND

Connect VS to 2.7V to 5.5V

supply on mid layer

Refer to package drawings at end of

datasheet for information on via sizes

and pad/solder mask openings.

Recommend filling vias with soldier to

maximize thermal performance.

Figure 11-1. INA254 Layout Example

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INA254

SLOS974 – JUNE 2021

Copyright © 2021 Texas Instruments Incorporated

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Product Folder Links: INA254