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UPD16686 Datasheet(PDF) 2 Page - NEC |
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UPD16686 Datasheet(HTML) 2 Page - NEC |
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2 / 99 page  Data Sheet S15548JJ1V0DS 2 µµµµPD16686, 16687 BLOCK DIAGRAM C86 PSX /CS1 CS2 /RD(E) /WR(R,/W) D7(SI) D6(SCL) D5 to D0 RS TM,S SIGIN1 SIGIN2 TSTIFS TSTRTST TSTVIHL TFR TFRSYNC TDOF TSISYNC /RES TESTOUT OSCIN1 OSCIN2 OSCOUT TOSCSYNC CLS C1, C1 C9 , C9 C1A VOUT + - + - VRS IRS VR AMPOUTP AMPOUT SEG1 SEG128 COM1 COM128 PCOM1 PSEG1 PSEG20 VLCD VLC1 VLC2 VLC3 VLC4 VDD1 VDD2 VSS Segment G/S and blink control Segment driver Display data RAM Display data latch Icon data RAM (20 x 2 bit) (128 x 128 x 2 bit) Address decoder Command decoder Timing generator D/A converter Op amp Register Data register I/O buffer Oscillator DC/DC converter LCD voltage generator Segment G/S and blink timer Pictograph common timing generator Pictograph segment driver Pictograph common driver Common driver Common timing generator Remark /xxx indicates active low signals. |
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